Page 1 EN : Th is Dat asheet is pr esent ed by t he m anuf act ur er . Please v isit our websit e f or pr icing and av ailabilit y at w w w.hest or e.hu.
Page 2 PIC32MX5XX/6XX/7XX Family Data Sheet High-Performance, USB, CAN and Ethernet 32-bit Flash Microcontrollers © 2010 Microchip Technology Inc. DS61156F...
Page 3 TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies.
Page 4 - Conversion available during Sleep and Idle • CAN module: • Two Analog Comparators - 2.0B Active with DeviceNet™ addressing support - Dedicated DMA channels • 3 MHz to 25 MHz crystal oscillator © 2010 Microchip Technology Inc. DS61156F-page 3...
Page 5 Diagrams” section for more information. Some pins between the UART, SPI and I C modules may be shared. Refer to the “Pin Diagrams” section for more information. Refer to 32.0 “Packaging Information” for more information. © 2010 Microchip Technology Inc. DS61156F-page 4...
Page 6 Diagrams” section for more information. Some pins between the UART, SPI and I C modules may be shared. Refer to the “Pin Diagrams” section for more information. Refer to 32.0 “Packaging Information” for more information. © 2010 Microchip Technology Inc. DS61156F-page 5...
Page 7 Diagrams” section for more information. Some pins between the UART, SPI and I C modules may be shared. Refer to the “Pin Diagrams” section for more information. Refer to 32.0 “Packaging Information” for more information. © 2010 Microchip Technology Inc. DS61156F-page 6...
Page 8 22 23 24 25 26 27 28 29 30 31 Note 1: The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to V externally. © 2010 Microchip Technology Inc. DS61156F-page 7...
Page 9 22 23 24 25 26 27 28 29 30 31 Note 1: The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to V externally. © 2010 Microchip Technology Inc. DS61156F-page 8...
Page 10 22 23 24 25 26 27 28 29 30 31 Note 1: The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to V externally. © 2010 Microchip Technology Inc. DS61156F-page 9...
Page 11 22 23 24 25 26 27 28 29 30 31 Note 1: The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to V externally. © 2010 Microchip Technology Inc. DS61156F-page 10...
Page 12 PIC32MX575F256H OSC1/CLKI/RC12 PIC32MX575F512H AN5/C1IN+/V /CN7/RB5 BUSON AN4/C1IN-/CN6/RB4 D+/RG2 AN3/C2IN+/CN5/RB3 D-/RG3 AN2/C2IN-/CN4/RB2 PGEC1/AN1/V -/CV -/CN3/RB1 PGED1/AN0/V +/CV +/PMA6/CN2/RB0 USBID/RF3 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 © 2010 Microchip Technology Inc. DS61156F-page 11...
Page 13 PIC32MX675F512H OSC1/CLKI/RC12 PIC32MX695F512H AN5/C1IN+/V /CN7/RB5 BUSON D+/RG2 AN4/C1IN-/CN6/RB4 D-/RG3 AN3/C2IN+/CN5/RB3 AN2/C2IN-/CN4/RB2 PGEC1/AN1/V -/CV -/CN3/RB1 USBID/RF3 PGED1/AN0/V +/CV +/PMA6/CN2/RB0 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 © 2010 Microchip Technology Inc. DS61156F-page 12...
Page 14 PIC32MX775F512H OSC1/CLKI/RC12 PIC32MX795F512H AN5/C1IN+/V /CN7/RB5 BUSON D+/RG2 AN4/C1IN-/CN6/RB4 D-/RG3 AN3/C2IN+/CN5/RB3 AN2/C2IN-/CN4/RB2 PGEC1/AN1/V -/CV -/CN3/RB1 USBID/RF3 PGED1/AN0/V +/CV +/PMA6/CN2/RB0 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 © 2010 Microchip Technology Inc. DS61156F-page 13...
Page 15 PIC32MX764F128H OSC2/CLKO/RC15 OSC1/CLKI/RC12 AN5/C1IN+/V /CN7/RB5 BUSON D+/RG2 AN4/C1IN-/CN6/RB4 D-/RG3 AN3/C2IN+/CN5/RB3 AN2/C2IN-/CN4/RB2 PGEC1/AN1/V -/CV -/CN3/RB1 USBID/RF3 PGED1/AN0/V +/CV +/PMA6/CN2/RB0 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 © 2010 Microchip Technology Inc. DS61156F-page 14...
Page 16: Table Of Contents
SCK2/U6TX/U3RTS/PMA5/CN8/RG6 SCL1/INT3/RA14 PIC32MX534F064L SDA4/SDI2/U3RX/PMA4/CN9/RG7 PIC32MX564F064L SCL4/SDO2/U3TX/PMA3/CN10/RG8 OSC2/CLKO/RC15 PIC32MX564F128L MCLR OSC1/CLKI/RC12 PIC32MX575F512L SS2/U6RX/U3CTS/PMA2/CN11/RG9 PIC32MX575F256L TDO/RA5 TDI/RA4 TMS/RA0 SDA2/RA3 INT1/RE8 SCL2/RA2 INT2/RE9 D+/RG2 AN5/C1IN+/V /CN7/RB5 BUSON D-/RG3 AN4/C1IN-/CN6/RB4 AN3/C2IN+/CN5/RB3 AN2/C2IN-/CN4/RB2 SCL3/SDO3/U1TX/RF8 PGEC1/AN1/CN3/RB1 SDA3/SDI3/U1RX/RF2 PGED1/AN0/CN2/RB0 USBID/RF3 © 2010 Microchip Technology Inc. DS61156F-page 15...
Page 17: Rg15
Pin Diagrams (Continued) 100-Pin TQFP = Pins are up to 5V tolerant SOSCO/T1CK/CN0/RC14 SOSCI/CN1/RC13 SDO1/OC1/INT0/RD0 EMDC/AEMDC/IC4/PMCS1/PMA14/RD11 AERXERR/RG15 SCK1/IC3/PMCS2/PMA15/RD10 SS1/IC2/RD9 PMD5/RE5 RTCC/EMDIO/AEMDIO/IC1/RD8 PIC32MX664F064L PMD6/RE6 AETXEN/SDA1/INT4/RA15 PIC32MX664F128L PMD7/RE7 AETXCLK/SCL1/INT3/RA14 PIC32MX675F256L T2CK/RC1 T3CK/RC2 PIC32MX675F512L OSC2/CLKO/RC15 T4CK/RC3 PIC32MX695F512L OSC1/CLKI/RC12 T5CK/SDI1/RC4 ECOL/SCK2/U6TX/U3RTS/PMA5/CN8/RG6 TDO/RA5 ECRS/SDA4/SDI2/U3RX/PMA4/CN9/RG7 TDI/RA4 ERXDV/AERXDV/ECRSDV/AECRSDV/SCL4/SDO2/U3TX/PMA3/CN10/RG8 SDA2/RA3 MCLR...
Page 18 Pin Diagrams (Continued) 100-Pin TQFP = Pins are up to 5V tolerant SOSCO/T1CK/CN0/RC14 SOSCI/CN1/RC13 SDO1/OC1/INT0/RD0 EMDC/AEMDC/IC4/PMCS1/PMA14/RD1 AERXERR/RG15 SCK1/IC3/PMCS2/PMA15/RD10 SS1/IC2/RD9 PMD5/RE5 RTCC/EMDIO/AEMDIO/IC1/RD8 PMD6/RE6 AETXEN/SDA1/INT4/RA15 PIC32MX775F256L PMD7/RE7 AETXCLK/SCL1/INT3/RA14 PIC32MX775F512L T2CK/RC1 PIC32MX795F512L T3CK/AC2TX/RC2 OSC2/CLKO/RC15 T4CK/AC2RX/RC3 OSC1/CLKI/RC12 T5CK/SDI1/RC4 ECOL/SCK2/U6TX/U3RTS/PMA5/CN8/RG6 TDO/RA5 ECRS/SDA4/SDI2/U3RX/PMA4/CN9/RG7 TDI/RA4 ERXDV/AERXDV/ECRSDV/AECRSDV/SCL4/SDO2/U3TX/PMA3/CN10/RG8 SDA2/RA3 MCLR SCL2/RA2 ERXCLK/AERXCLK/EREFCLK/AEREFCLK/SS2/U6RX/U3CTS/PMA2/CN11/RG9...
Page 19: Pmd5/Re5
Pin Diagrams (Continued) 100-Pin TQFP = Pins are up to 5V tolerant SOSCO/T1CK/CN0/RC14 SOSCI/CN1/RC13 SDO1/OC1/INT0/RD0 EMDC/AEMDC/IC4/PMCS1/PMA14/RD1 SCK1/IC3/PMCS2/PMA15/RD10 AERXERR/RG15 SS1/IC2/RD9 RTCC/EMDIO/AEMDIO/IC1/RD8 PMD5/RE5 AETXEN/SDA1/INT4/RA15 PMD6/RE6 AETXCLK/SCL1/INT3/RA14 PIC32MX764F128L PMD7/RE7 T2CK/RC1 OSC2/CLKO/RC15 T3CK/RC2 OSC1/CLKI/RC12 T4CK/RC3 T5CK/SDI1/RC4 TDO/RA5 ECOL/SCK2/U6TX/U3RTS/PMA5/CN8/RG6 TDI/RA4 ECRS/SDA4/SDI2/U3RX/PMA4/CN9/RG7 SDA2/RA3 ERXDV/AERXDV/ECRSDV/AECRSDV/SCL4/SDO2/U3TX/PMA3/CN10/RG8 SCL2/RA2 MCLR D+/RG2 ERXCLK/AERXCLK/EREFCLK/AEREFCLK/SS2/U6RX/U3CTS/PMA2/CN11/RG9 D-/RG3...
Page 20 RC13 RD11 RD13 RD10 RA15 RA14 MCLR RC12 RC15 RB11 RB12 RA10 RF12 RB14 RD15 RB10 RB13 RB15 RD14 RF13 Note 1: Refer to Table Table 5 Table 6 for full pin names. © 2010 Microchip Technology Inc. DS61156F-page 19...
Page 21: Pmd6/Re6
AN3/C2IN+/CN5/RB3 No Connect (NC) AN2/C2IN-/CN4/RB2 PMD14/CN15/RD6 PGED2/AN7/RB7 PMD13/CN19/RD13 SDO1/OC1/INT0/RD0 AN11/PMA12/RB11 No Connect (NC) TCK/RA1 SCK1/IC3/PMCS2/PMA15/RD10 AN12/PMA11/RB12 T5CK/SDI1/RC4 No Connect (NC) T4CK/RC3 No Connect (NC) SCK2/U6TXU6TX/U3RTS/PMA5/CN8/RG6 SCL3/SDO3/U1TX/RF8 T3CK/RC2 D-/RG3 PGEC1/AN1/CN3/RB1 PMD9/RG1 PGED1/AN0/CN2/RB0 +/CV +/PMA6/RA10 © 2010 Microchip Technology Inc. DS61156F-page 20...
Page 22 PIC32MX575F256L AND PIC32MX575F512L DEVICES (CONTINUED) Full Pin Name Full Pin Name Number Number AN8/C1OUT/RB8 No Connect (NC) AN9/C2OUT/RB9 AC1RX/SS4/U5RX/U2CTS/RF12 AN10/CV /PMA13/RB10 REFOUT AN14/PMALH/PMA1/RB14 AC1TX/SCK4/U5TX/U2RTS/RF13 AN13/PMA10/RB13 SCK3/U4TX/U1RTS/CN21/RD15 AN15/OCFB/PMALL/PMA0/CN12/RB15 USBID/RF3 SS3/U4RX/U1CTS/CN20/RD14 SDA3/SDI3/U1RX/RF2 SDA5/SDI4/U2RX/PMA9/CN17/RF4 PGEC2/AN6/OCFA/RB6 SCL5/SDO4/U2TX/PMA8/CN18/RF5 -/CV -/PMA7/RA9 © 2010 Microchip Technology Inc. DS61156F-page 21...
Page 23: Pmd7/Re7
AN3/C2IN+/CN5/RB3 No Connect (NC) AN2/C2IN-/CN4/RB2 ETXEN/PMD14/CN15/RD6 PGED2/AN7/RB7 ETXD3/PMD13/CN19/RD13 SDO1/OC1/INT0/RD0 AN11/ERXERR/AETXERR/PMA12/RB11 No Connect (NC) TCK/RA1 SCK1/IC3/PMCS2/PMA15/RD10 AN12/ERXD0/AECRS/PMA11/RB12 T5CK/SDI1/RC4 No Connect (NC) T4CK/RC3 No Connect (NC) ECOL/SCK2/U6TX/U3RTS/PMA5/CN8/RG6 SCL3/SDO3/U1TX/RF8 T3CK/RC2 D-/RG3 PGEC1/AN1/CN3/RB1 ETXERR/PMD9/RG1 PGED1/AN0/CN2/RB0 +/CV +/AERXD3/PMA6/RA10 © 2010 Microchip Technology Inc. DS61156F-page 22...
Page 24 PIC32MX675F512L AND PIC32MX695F512L DEVICES (CONTINUED) Full Pin Name Full Pin Name Number Number AN8/C1OUT/RB8 No Connect (NC) AN9/C2OUT/RB9 SS4/U5RX/U2CTS/RF12 AN10/CV /PMA13/RB10 REFOUT AN14/ERXD2/AETXD3/PMALH/PMA1/RB14 SCK4/U5TX/U2RTS/RF13 AN13/ERXD1/AECOL/PMA10/RB13 AETXD1/SCK3/U4TX/U1RTS/CN21/RD15 AN15/ERXD3/AETXD2/OCFB/PMALL/PMA0/CN12/RB15 USBID/RF3 AETXD0/SS3/U4RX/U1CTS/CN20/RD14 SDA3/SDI3/U1RX/RF2 SDA5/SDI4/U2RX/PMA9/CN17/RF4 PGEC2/AN6/OCFA/RB6 SCL5/SDO4/U2TX/PMA8/CN18/RF5 -/CV -/AERXD2/PMA7/RA9 © 2010 Microchip Technology Inc. DS61156F-page 23...
Page 25: T2Ck/Rc1
AN3/C2IN+/CN5/RB3 No Connect (NC) AN2/C2IN-/CN4/RB2 ETXEN/PMD14/CN15/RD6 PGED2/AN7/RB7 ETXD3/PMD13/CN19/RD13 SDO1/OC1/INT0/RD0 AN11/ERXERR/AETXERR/PMA12/RB11 No Connect (NC) TCK/RA1 SCK1/IC3/PMCS2/PMA15/RD10 AN12/ERXD0/AECRS/PMA11/RB12 T5CK/SDI1/RC4 No Connect (NC) T4CK/AC2RX/RC3 No Connect (NC) ECOL/SCK2/U6TX/U3RTS/PMA5/CN8/RG6 SCL3/SDO3/U1TX/RF8 T3CK/AC2TX/RC2 D-/RG3 PGEC1/AN1/CN3/RB1 C2TX/ETXERR/PMD9/RG1 PGED1/AN0/CN2/RB0 +/CV +/AERXD3/PMA6/RA10 © 2010 Microchip Technology Inc. DS61156F-page 24...
Page 26 PIC32MX795F512L DEVICES (CONTINUED) Full Pin Name Full Pin Name Number Number AN8/C1OUT/RB8 No Connect (NC) AN9/C2OUT/RB9 AC1RX/SS4/U5RX/U2CTS/RF12 AN10/CV /PMA13/RB10 REFOUT AN14/ERXD2/AETXD3/PMALH/PMA1/RB14 AC1TX/SCK4/U5TX/U2RTS/RF13 AN13/ERXD1/AECOL/PMA10/RB13 AETXD1/SCK3/U4TX/U1RTS/CN21/RD15 AN15/ERXD3/AETXD2/OCFB/PMALL/PMA0/CN12/RB15 USBID/RF3 AETXD0/SS3/U4RX/U1CTS/CN20/RD14 SDA3/SDI3/U1RX/RF2 SDA5/SDI4/U2RX/PMA9/CN17/RF4 PGEC2/AN6/OCFA/RB6 SCL5/SDO4/U2TX/PMA8/CN18/RF5 -/CV -/AERXD2/PMA7/RA9 © 2010 Microchip Technology Inc. DS61156F-page 25...
Page 27: T3Ck/Rc2
AN3/C2IN+/CN5/RB3 No Connect (NC) AN2/C2IN-/CN4/RB2 ETXEN/PMD14/CN15/RD6 PGED2/AN7/RB7 ETXD3/PMD13/CN19/RD13 SDO1/OC1/INT0/RD0 AN11/ERXERR/AETXERR/PMA12/RB11 No Connect (NC) TCK/RA1 SCK1/IC3/PMCS2/PMA15/RD10 AN12/ERXD0/AECRS/PMA11/RB12 T5CK/SDI1/RC4 No Connect (NC) T4CK/RC3 No Connect (NC) ECOL/SCK2/U6TX/U3RTS/PMA5/CN8/RG6 SCL3/SDO3/U1TX/RF8 T3CK/RC2 D-/RG3 PGEC1/AN1/CN3/RB1 ETXERR/PMD9/RG1 PGED1/AN0/CN2/RB0 +/CV +/AERXD3/PMA6/RA10 © 2010 Microchip Technology Inc. DS61156F-page 26...
Page 28 PIN NAME: PIC32MX764F128L DEVICE (CONTINUED) Full Pin Name Full Pin Name Number Number AN8/C1OUT/RB8 No Connect (NC) AN9/C2OUT/RB9 AC1RX/SS4/U5RX/U2CTS/RF12 AN10/CV /PMA13/RB10 REFOUT AN14/ERXD2/AETXD3/PMALH/PMA1/RB14 AC1TX/SCK4/U5TX/U2RTS/RF13 AN13/ERXD1/AECOL/PMA10/RB13 AETXD1/SCK3/U4TX/U1RTS/CN21/RD15 AN15/ERXD3/AETXD2/OCFB/PMALL/PMA0/CN12/RB15 USBID/RF3 AETXD0/SS3/U4RX/U1CTS/CN20/RD14 SDA3/SDI3/U1RX/RF2 SDA5/SDI4/U2RX/PMA9/CN17/RF4 PGEC2/AN6/OCFA/RB6 SCL5/SDO4/U2TX/PMA8/CN18/RF5 -/CV -/AERXD2/PMA7/RA9 © 2010 Microchip Technology Inc. DS61156F-page 27...
Page 29 30.0 Development Support................................177 31.0 Electrical Characteristics ................................181 32.0 Packaging Information................................225 Appendix A: Migrating from PIC32MX3XX/4XX to PIC32MX5XX/6XX/7XX Devices ................ 239 Appendix B: Revision History................................240 The Microchip Web Site ..................................251 Customer Change Notification Service .............................. 251 Customer Support ....................................
Page 30 When contacting a sales office, please specify which device, revision of silicon and data sheet (include literature num- ber) you are using. Customer Notification System Register on our web site at www.microchip.com to receive the most current information on all of our products. © 2010 Microchip Technology Inc. DS61156F-page 29...
Page 32: Device Overview
This document contains device-specific information for PIC32MX5XX/6XX/7XX devices. Note 1: This data sheet summarizes the features Figure 1-1 illustrates a general block diagram of the of the PIC32MX5XX/6XX/7XX family of core peripheral modules devices. It is not intended to be a PIC32MX5XX/6XX/7XX family of devices.
Page 33: 2010 Microchip Technology Inc
I = Input TTL = TTL input buffer Note 1: Pin numbers are provided for reference only. See the “Pin Diagrams” section for device pin availability. Section 24.0 “Ethernet Controller” for more information. © 2010 Microchip Technology Inc. DS61156F-page 32...
Page 34: 2010 Microchip Technology Inc
I = Input TTL = TTL input buffer Note 1: Pin numbers are provided for reference only. See the “Pin Diagrams” section for device pin availability. Section 24.0 “Ethernet Controller” for more information. © 2010 Microchip Technology Inc. DS61156F-page 33...
Page 35: 2010 Microchip Technology Inc
I = Input TTL = TTL input buffer Note 1: Pin numbers are provided for reference only. See the “Pin Diagrams” section for device pin availability. Section 24.0 “Ethernet Controller” for more information. © 2010 Microchip Technology Inc. DS61156F-page 34...
Page 36: 2010 Microchip Technology Inc
I = Input TTL = TTL input buffer Note 1: Pin numbers are provided for reference only. See the “Pin Diagrams” section for device pin availability. Section 24.0 “Ethernet Controller” for more information. © 2010 Microchip Technology Inc. DS61156F-page 35...
Page 37: 2010 Microchip Technology Inc
I = Input TTL = TTL input buffer Note 1: Pin numbers are provided for reference only. See the “Pin Diagrams” section for device pin availability. Section 24.0 “Ethernet Controller” for more information. © 2010 Microchip Technology Inc. DS61156F-page 36...
Page 38: 2010 Microchip Technology Inc
I = Input TTL = TTL input buffer Note 1: Pin numbers are provided for reference only. See the “Pin Diagrams” section for device pin availability. Section 24.0 “Ethernet Controller” for more information. © 2010 Microchip Technology Inc. DS61156F-page 37...
Page 39: 2010 Microchip Technology Inc
I = Input TTL = TTL input buffer Note 1: Pin numbers are provided for reference only. See the “Pin Diagrams” section for device pin availability. Section 24.0 “Ethernet Controller” for more information. © 2010 Microchip Technology Inc. DS61156F-page 38...
Page 40: 2010 Microchip Technology Inc
I = Input TTL = TTL input buffer Note 1: Pin numbers are provided for reference only. See the “Pin Diagrams” section for device pin availability. Section 24.0 “Ethernet Controller” for more information. © 2010 Microchip Technology Inc. DS61156F-page 39...
Page 41: 2010 Microchip Technology Inc
I = Input TTL = TTL input buffer Note 1: Pin numbers are provided for reference only. See the “Pin Diagrams” section for device pin availability. Section 24.0 “Ethernet Controller” for more information. © 2010 Microchip Technology Inc. DS61156F-page 40...
Page 42: Guidelines For Getting Started With 32-Bit Microcontrollers
Basic Connection Requirements length from the pin to the capacitor is within one- quarter inch (6 mm) in length. Getting started with the PIC32MX5XX/6XX/7XX family • Handling high frequency noise: If the board is of 32-bit Microcontrollers (MCUs) requires attention to...
Page 43: 2010 Microchip Technology Inc
Overstress (EOS). Ensure that the MCLR pin and V specifications are met. 3: The capacitor can be sized to prevent uninten- tional Resets from brief glitches or to extend the device Reset period during POR. © 2010 Microchip Technology Inc. DS61156F-page 42...
Page 44: 2010 Microchip Technology Inc
• “Using MPLAB ICD 3” (poster) DS51765 ® • “MPLAB ICD 3 Design Advisory” DS51764 ® • “MPLAB REAL ICE™ In-Circuit Debugger User’s Guide” DS51616 ® • “Using MPLAB REAL ICE™ Emulator” (poster) DS51749 © 2010 Microchip Technology Inc. DS61156F-page 43...
Page 45: 2010 Microchip Technology Inc
They can be configured as outputs and driven Guard Ring to a logic-low state. Alternatively, inputs can be reserved by connecting the Main Oscillator pin to V through a 1k to 10k resistor and configuring the pin as an input. © 2010 Microchip Technology Inc. DS61156F-page 44...
Page 46: Pic32 Mcu
- Atomic interrupt enable/disable - GPR shadow registers to minimize latency Note 1: This data sheet summarizes the features for interrupt handlers of the PIC32MX5XX/6XX/7XX family of - Bit field manipulation instructions devices. It is not intended to be a ®...
Page 47: 2010 Microchip Technology Inc
PIC32MX5XX/6XX/7XX Architecture Overview 3.2.2 MULTIPLY/DIVIDE UNIT (MDU) The PIC32MX5XX/6XX/7XX family core includes a The PIC32MX5XX/6XX/7XX family core contains sev- Multiply/Divide Unit (MDU) that contains a separate eral logic blocks working together in parallel, providing pipeline for multiply and divide operations. This pipeline an efficient high-performance computing engine.
Page 48: 2010 Microchip Technology Inc
PIC32MX5XX/6XX/7XX TABLE 3-1: PIC32MX5XX/6XX/7XX FAMILY CORE HIGH-PERFORMANCE INTEGER MULTIPLY/DIVIDE UNIT LATENCIES AND REPEAT RATES Opcode Operand Size (mul rt) (div rs) Latency Repeat Rate 16 bits MULT/MULTU, MADD/MADDU, MSUB/MSUBU 32 bits 16 bits 32 bits 8 bits DIV/DIVU 16 bits...
Page 49: 2010 Microchip Technology Inc
COPROCESSOR 0 REGISTERS Register Register Function Number Name Reserved Reserved in the PIC32MX5XX/6XX/7XX family core. HWREna Enables access via the RDHWR instruction to selected hardware registers. BadVAddr Reports the address for the most recent address-related exception. Count Processor cycle count.
Page 50: 2010 Microchip Technology Inc
Table 3-3 lists the exception types in order of priority. TABLE 3-3: PIC32MX5XX/6XX/7XX FAMILY CORE EXCEPTION TYPES Exception Description Reset Assertion MCLR or a Power-on Reset (POR). EJTAG debug single step.
Page 51: 2010 Microchip Technology Inc
JTAG instructions, special instructions The majority of the power consumed by the defined in the EJTAG specification define which PIC32MX5XX/6XX/7XX family core is in the clock tree registers are selected and how they are used. and clocking registers. The PIC32 family uses exten- sive use of local gated clocks to reduce this dynamic power consumption.
Page 52: Memory Organization
Flash controller, that access memory independently of PIC32MX5XX/6XX/7XX microcontrollers provide 4 GB the CPU. of unified virtual memory address space. All memory The memory maps for the PIC32MX5XX/6XX/7XX regions, including program, data memory, SFRs and devices are illustrated in Figure 4-1...
Page 53: 2010 Microchip Technology Inc
2: The size of this memory region is programmable (see Section 3. “Memory Organization” (DS61115)) and can be changed by initialization code provided by end user development tools (refer to the specific development tool documentation for information). © 2010 Microchip Technology Inc. DS61156F-page 52...
Page 54: Pic32Mx534F064L
2: The size of this memory region is programmable (see Section 3. “Memory Organization” (DS61115)) and can be changed by initialization code provided by end user development tools (refer to the specific development tool documentation for information). © 2010 Microchip Technology Inc. DS61156F-page 53...
Page 55: Pic32Mx564F128L
2: The size of this memory region is programmable (see Section 3. “Memory Organization” (DS61115)) and can be changed by initialization code provided by end user development tools (refer to the specific development tool documentation for information). © 2010 Microchip Technology Inc. DS61156F-page 54...
Page 56: 2010 Microchip Technology Inc
2: The size of this memory region is programmable (see Section 3. “Memory Organization” (DS61115)) and can be changed by initialization code provided by end user development tools (refer to the specific development tool documentation for information). © 2010 Microchip Technology Inc. DS61156F-page 55...
Page 57: Pic32Mx575F512L
2: The size of this memory region is programmable (see Section 3. “Memory Organization” (DS61115)) and can be changed by initialization code provided by end user development tools (refer to the specific development tool documentation for information). © 2010 Microchip Technology Inc. DS61156F-page 56...
Page 58: 2010 Microchip Technology Inc
2: The size of this memory region is programmable (see Section 3. “Memory Organization” (DS61115)) and can be changed by initialization code provided by end user development tools (refer to the specific development tool documentation for information). © 2010 Microchip Technology Inc. DS61156F-page 57...
Page 59 TABLE 4-1: BUS MATRIX REGISTER MAP Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — BMXCHEDMA — — — — — BMXERRIXI BMXERRICD BMXERRDMA BMXERRDS BMXERRIS 001F 2000 BMXCON 15:0...
Page 60 TABLE 4-2: INTERRUPT REGISTER MAP FOR PIC32MX534F064H, PIC32MX564F064H, PIC32MX564F128H, PIC32MX575F256H AND PIC32MX575F512H DEVICES Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — —...
Page 61 TABLE 4-2: INTERRUPT REGISTER MAP FOR PIC32MX534F064H, PIC32MX564F064H, PIC32MX564F128H, PIC32MX575F256H AND PIC32MX575F512H DEVICES (CONTINUED) Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — INT2IP<2:0> INT2IS<1:0> — — — OC2IP<2:0>...
Page 62 TABLE 4-3: INTERRUPT REGISTER MAP FOR PIC32MX664F064H, PIC32MX664F128H, PIC32MX675F256H, PIC32MX675F512H AND PIC32MX695F512H DEVICES Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — —...
Page 63 TABLE 4-3: INTERRUPT REGISTER MAP FOR PIC32MX664F064H, PIC32MX664F128H, PIC32MX675F256H, PIC32MX675F512H AND PIC32MX695F512H DEVICES (CONTINUED) Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — INT4IP<2:0> INT4IS<1:0> — — — OC4IP<2:0>...
Page 64 TABLE 4-4: INTERRUPT REGISTER MAP FOR PIC32MX764F128H, PIC32MX775F256H, PIC32MX775F512H AND PIC32MX795F512H DEVICES Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — —...
Page 65 TABLE 4-4: INTERRUPT REGISTER MAP FOR PIC32MX764F128H, PIC32MX775F256H, PIC32MX775F512H AND PIC32MX795F512H DEVICES (CONTINUED) Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — INT4IP<2:0> INT4IS<1:0> — — — OC4IP<2:0> OC4IS<1:0>...
Page 66: Pic32Mx575F256L
TABLE 4-5: INTERRUPT REGISTER MAP FOR PIC32MX534F064L, PIC32MX564F064L, PIC32MX564F128L PIC32MX575F512L AND PIC32MX575F256L DEVICES Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — —...
Page 67 TABLE 4-5: INTERRUPT REGISTER MAP FOR PIC32MX534F064L, PIC32MX564F064L, PIC32MX564F128L PIC32MX575F512L AND PIC32MX575F256L DEVICES (CONTINUED) Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — INT4IP<2:0> INT4IS<1:0> — — — OC4IP<2:0>...
Page 68 TABLE 4-6: INTERRUPT REGISTER MAP FOR PIC32MX664F064L, PIC32MX664F128L, PIC32MX675F256L, PIC32MX675F512L AND PIC32MX695F512L DEVICES Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — —...
Page 69 TABLE 4-6: INTERRUPT REGISTER MAP FOR PIC32MX664F064L, PIC32MX664F128L, PIC32MX675F256L, PIC32MX675F512L AND PIC32MX695F512L DEVICES (CONTINUED) Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — INT4IP<2:0> INT4IS<1:0> — — — OC4IP<2:0>...
Page 70 TABLE 4-7: INTERRUPT REGISTER MAP FOR PIC32MX764F128L, PIC32MX775F256L, PIC32MX775F512L AND PIC32MX795F512L DEVICES Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — —...
Page 71 TABLE 4-7: INTERRUPT REGISTER MAP FOR PIC32MX764F128L, PIC32MX775F256L, PIC32MX775F512L AND PIC32MX795F512L DEVICES (CONTINUED) Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — INT4IP<2:0> INT4IS<1:0> — — — OC4IP<2:0> OC4IS<1:0>...
Page 72 TABLE 4-8: TIMER1-TIMER5 REGISTER MAP Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — — — — 0000 0600 T1CON 15:0 SIDL...
Page 73 TABLE 4-9: INPUT CAPTURE 1-INPUT CAPTURE 5 REGISTER MAP Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — —...
Page 74 TABLE 4-10: OUTPUT COMPARE 1-OUTPUT COMPARE 5 REGISTER MAP Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — —...
Page 75 TABLE 4-11: I2C1, I2C3, I2C4 AND I2C5 REGISTER MAP Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — —...
Page 76 TABLE 4-11: I2C1, I2C3, I2C4 AND I2C5 REGISTER MAP (CONTINUED) Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — —...
Page 77 TABLE 4-12: I2C2 REGISTER MAP FOR PIC32MX534F064L, PIC32MX564F064L, PIC32MX564F128L, PIC32MX575F256L, PIC32MX575F512L, PIC32MX664F064L, PIC32MX664F128L, PIC32MX675F256L, PIC32MX675F512L, PIC32MX695F512L, PIC32MX764F128L, PIC32MX775F256L, PIC32MX775F512L AND PIC32MX795F512L DEVICES Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 —...
Page 78 TABLE 4-13: UART1 THROUGH UART6 REGISTER MAP Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — — — —...
Page 79 TABLE 4-13: UART1 THROUGH UART6 REGISTER MAP (CONTINUED) Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — — —...
Page 80 TABLE 4-14: SPI2, SPI3 AND SPI4 REGISTER MAP Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 FRMEN FRMSYNC FRMPOL MSSEN FRMSYPW FRMCNT<2:0> — — — — — — SPIFE ENHBUF 0000 5800 SPI3CON 15:0 SIDL...
Page 81 TABLE 4-15: SPI1 REGISTER MAP FOR PIC32MX534F064L, PIC32MX564F064L, PIC32MX564F128L, PIC32MX575F256L, PIC32MX575F512L, PIC32MX664F064L, PIC32MX664F128L, PIC32MX675F256L, PIC32MX675F512L, PIC32MX695F512L, PIC32MX764F128L, PIC32MX775F256L, PIC32MX775F512L AND PIC32MX795F512L DEVICES Bits Register Name 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 FRMEN...
Page 82 TABLE 4-16: ADC REGISTER MAP Bits Register Name 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — — — —...
Page 83 TABLE 4-16: ADC REGISTER MAP (CONTINUED) Bits Register Name 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 0000 9130 ADC1BUFC ADC Result Word C (ADC1BUFC<31:0>) 15:0 0000 31:16 0000 9140 ADC1BUFD ADC Result Word D (ADC1BUFD<31:0>) 15:0 0000...
Page 84 TABLE 4-17: DMA GLOBAL REGISTER MAP Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — — — — 0000 3000 DMACON 15:0...
Page 85 (1,2) TABLE 4-19: DMA CHANNELS 0-7 REGISTER MAP Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — — —...
Page 86 (1,2) TABLE 4-19: DMA CHANNELS 0-7 REGISTER MAP (CONTINUED) Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — —...
Page 87 (1,2) TABLE 4-19: DMA CHANNELS 0-7 REGISTER MAP (CONTINUED) Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — —...
Page 88 (1,2) TABLE 4-19: DMA CHANNELS 0-7 REGISTER MAP (CONTINUED) Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — —...
Page 89 (1,2) TABLE 4-19: DMA CHANNELS 0-7 REGISTER MAP (CONTINUED) Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — —...
Page 90 (1,2) TABLE 4-19: DMA CHANNELS 0-7 REGISTER MAP (CONTINUED) Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — —...
Page 91 TABLE 4-20: COMPARATOR REGISTER MAP Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — — — — 0000 A000 CM1CON 15:0 CPOL...
Page 92 TABLE 4-22: FLASH CONTROLLER REGISTER MAP Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — — — — 0000 F400 NVMCON 15:0...
Page 93 TABLE 4-24: PORTA REGISTER MAP FOR PIC32MX534F064L, PIC32MX564F064L, PIC32MX564F128L, PIC32MX575F256L, PIC32MX575F512L, PIC32MX664F064L, PIC32MX664F128L, PIC32MX675F256L, PIC32MX675F512L, PIC32MX695F512L, PIC32MX764F128L, PIC32MX775F256L, PIC32MX775F512L AND PIC32MX795F512L DEVICES Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 —...
Page 94 TABLE 4-26: PORTC REGISTER MAP FOR PIC32MX534F064H, PIC32MX564F064H, PIC32MX564F128H, PIC32MX575F256H, PIC32MX575F512H, PIC32MX664F064H, PIC32MX664F128H, PIC32MX675F256H, PIC32MX675F512H, PIC32MX695F512H, PIC32MX764F128H, PIC32MX775F256H, PIC32MX775F512H AND PIC32MX795F512H DEVICES Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 —...
Page 95 TABLE 4-28: PORTD REGISTER MAP FOR PIC32MX534F064H, PIC32MX564F064H, PIC32MX564F128H, PIC32MX575F256H, PIC32MX575F512H, PIC32MX664F064H, PIC32MX664F128H, PIC32MX675F256H, PIC32MX675F512H, PIC32MX695F512H, PIC32MX775F256H, PIC32MX775F512H AND PIC32MX795F512H DEVICES Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — —...
Page 96 TABLE 4-30: PORTE REGISTER MAP FOR PIC32MX534F064H, PIC32MX564F064H, PIC32MX564F128H, PIC32MX575F256H, PIC32MX575F512H, PIC32MX664F064H, PIC32MX664F128H, PIC32MX675F256H, PIC32MX675F512H, PIC32MX695F512H, PIC32MX775F256H, PIC32MX775F512H AND PIC32MX795F512H DEVICES Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — —...
Page 97 TABLE 4-32: PORTF REGISTER MAP FOR PIC32MX534F064H, PIC32MX564F064H, PIC32MX564F128H, PIC32MX575F256H, PIC32MX575F512H, PIC32MX664F064H, PIC32MX664F128H, PIC32MX675F256H, PIC32MX675F512H, PIC32MX695F512H, PIC32MX775F256H, PIC32MX775F512H AND PIC32MX795F512H DEVICES Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — —...
Page 98 TABLE 4-34: PORTG REGISTER MAP FOR PIC32MX534F064H, PIC32MX564F064H, PIC32MX564F128H, PIC32MX575F256H, PIC32MX575F512H, PIC32MX664F064H, PIC32MX664F128H, PIC32MX675F256H, PIC32MX675F512H, PIC32MX695F512H, PIC32MX764F128H, PIC32MX775F256H, PIC32MX775F512H AND PIC32MX795F512H DEVICES Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 —...
Page 99 TABLE 4-36: CHANGE NOTICE AND PULL-UP REGISTER MAP FOR PIC32MX534F064L, PIC32MX564F064L, PIC32MX564F128L, PIC32MX575F256L, PIC32MX575F512L, PIC32MX664F064L, PIC32MX664F128L, PIC32MX675F256L, PIC32MX675F512L, PIC32MX695F512L, PIC32MX764F128L, PIC32MX775F256L, PIC32MX775F512 AND PIC32MX795F512L DEVICES Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16...
Page 100 TABLE 4-38: PARALLEL MASTER PORT REGISTER MAP Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — — — —...
Page 101 TABLE 4-40: PREFETCH REGISTER MAP Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — — — CHECOH 0000 (1,2) 4000 CHECON 15:0...
Page 102 TABLE 4-41: RTCC REGISTER MAP Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — CAL<9:0> 0000 0200 RTCCON 15:0 SIDL — — — — — RTSECSEL RTCCLKON —...
Page 103 = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal. Note Reset values are dependent on the device variant. Refer to “PIC32MX5XX/6XX/7XX Family Silicon Errata and Data Sheet Clarification” (DS80480) for more information.
Page 104 TABLE 4-44: USB REGISTER MAP Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — — — — 0000 5040 U1OTGIR 15:0...
Page 105 TABLE 4-44: USB REGISTER MAP (CONTINUED) Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — — — — 0000 5290 U1FRMH...
Page 106 TABLE 4-44: USB REGISTER MAP (CONTINUED) Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — — — — — — — — — — — — — 0000 53B0 U1EP11...
Page 107 TABLE 4-45: CAN1 REGISTER SUMMARY FOR PIC32MX534F064H, PIC32MX564F064H, PIC32MX564F128H, PIC32MX575F256H, PIC32MX575F512H, PIC32MX764F128H, PIC32MX775F256H, PIC32MX775F512H, PIC32MX795F512H, PIC32MX534F064L, PIC32MX564F064L, PIC32MX564F128L, PIC32MX575F256L, PIC32MX575F512L, PIC32MX764F128L, PIC32MX775F256L, PIC32MX775F512L AND PIC32MX795F512L DEVICES Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0...
Page 108 TABLE 4-45: CAN1 REGISTER SUMMARY FOR PIC32MX534F064H, PIC32MX564F064H, PIC32MX564F128H, PIC32MX575F256H, PIC32MX575F512H, PIC32MX764F128H, PIC32MX775F256H, PIC32MX775F512H, PIC32MX795F512H, PIC32MX534F064L, PIC32MX564F064L, PIC32MX564F128L, PIC32MX575F256L, PIC32MX575F512L, PIC32MX764F128L, PIC32MX775F256L, PIC32MX775F512L AND PIC32MX795F512L DEVICES (CONTINUED) Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1...
Page 109 TABLE 4-46: CAN2 REGISTER SUMMARY FOR PIC32MX775F256H, PIC32MX775F512H, PIC32MX795F512H, PIC32MX775F256L, PIC32MX775F512L AND PIC32MX795F512L DEVICES Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 — — — — ABAT REQOP<2:0> OPMOD<2:0> CANCAP —...
Page 110 TABLE 4-46: CAN2 REGISTER SUMMARY FOR PIC32MX775F256H, PIC32MX775F512H, PIC32MX795F512H, PIC32MX775F256L, PIC32MX775F512L AND PIC32MX795F512L DEVICES (CONTINUED) Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0 31:16 FLTEN19 MSEL19<1:0> FSEL19<4:0> FLTEN18 MSEL18<1:0> FSEL18<4:0> 0000 C100 C2FLTCON4 15:0 FLTEN17...
Page 111 TABLE 4-47: ETHERNET CONTROLLER REGISTER SUMMARY FOR PIC32MX664F064H, PIC32MX664F128H, PIC32MX664F064L, PIC32MX664F128L, PIC32MX675F256H, PIC32MX675F512H, PIC32MX695F512H, PIC32MX775F256H, PIC32MX775F512H, PIC32MX795F512H, PIC32MX695F512L, PIC32MX675F256L, PIC32MX675F512L, PIC32MX764F128H, PIC32MX764F128L, PIC32MX775F256L, PIC32MX775F512L AND PIC32MX795F512L DEVICES Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1...
Page 112 TABLE 4-47: ETHERNET CONTROLLER REGISTER SUMMARY FOR PIC32MX664F064H, PIC32MX664F128H, PIC32MX664F064L, PIC32MX664F128L, PIC32MX675F256H, PIC32MX675F512H, PIC32MX695F512H, PIC32MX775F256H, PIC32MX775F512H, PIC32MX795F512H, PIC32MX695F512L, PIC32MX675F256L, PIC32MX675F512L, PIC32MX764F128H, PIC32MX764F128L, PIC32MX775F256L, PIC32MX775F512L AND PIC32MX795F512L DEVICES (CONTINUED) Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2...
Page 113 TABLE 4-47: ETHERNET CONTROLLER REGISTER SUMMARY FOR PIC32MX664F064H, PIC32MX664F128H, PIC32MX664F064L, PIC32MX664F128L, PIC32MX675F256H, PIC32MX675F512H, PIC32MX695F512H, PIC32MX775F256H, PIC32MX775F512H, PIC32MX795F512H, PIC32MX695F512L, PIC32MX675F256L, PIC32MX675F512L, PIC32MX764F128H, PIC32MX764F128L, PIC32MX775F256L, PIC32MX775F512L AND PIC32MX795F512L DEVICES (CONTINUED) Bits 31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2...
Page 114: Flash Program Memory
PIC32MX5XX/6XX/7XX FLASH PROGRAM MEMORY PIC32MX5XX/6XX/7XX devices contain an internal Flash program memory for executing user code. There Note 1: This data sheet summarizes the features are three methods by which the user can program this of the PIC32MX5XX/6XX/7XX family of memory: devices.
Page 116: Resets
Master Reset signal, SYSRST. The Note 1: This data sheet summarizes the features following is a list of device Reset sources: of the PIC32MX5XX/6XX/7XX family of • POR: Power-on Reset devices. It is not intended to be a •...
Page 118: Interrupt Controller
PIC32MX5XX/6XX/7XX INTERRUPT CONTROLLER The PIC32MX5XX/6XX/7XX interrupt module includes the following features: Note 1: This data sheet summarizes the features • Up to 96 interrupt sources of the PIC32MX5XX/6XX/7XX family of • Up to 64 interrupt vectors devices. It is not intended to be a •...
Page 119 IPC6<17:16> AD1 – ADC1 Convert Done IFS1<1> IEC1<1> IPC6<28:26> IPC6<25:24> Note 1: Not all interrupt sources are available on all devices. See Table Table 2 Table 3 for the list of available peripherals. © 2010 Microchip Technology Inc. DS61156F-page 118...
Page 120 IC4E – Input Capture 4 Error IFS2<0> IEC2<0> IPC4<12:10> IPC4<9:8> Note 1: Not all interrupt sources are available on all devices. See Table Table 2 Table 3 for the list of available peripherals. © 2010 Microchip Technology Inc. DS61156F-page 119...
Page 121 — — — — — — Lowest Natural Order Priority Note 1: Not all interrupt sources are available on all devices. See Table Table 2 Table 3 for the list of available peripherals. © 2010 Microchip Technology Inc. DS61156F-page 120...
Page 122: Oscillator Configuration
PIC32MX5XX/6XX/7XX OSCILLATOR The PIC32MX5XX/6XX/7XX oscillator system has the following modules and features: CONFIGURATION • A Total of four external and internal oscillator Note 1: This data sheet summarizes the features options as clock sources of the PIC32MX5XX/6XX/7XX family of • On-Chip PLL with user-selectable input divider, multiplier and output divider to boost operating devices.
Page 124: Prefetch Cache
Flash memory Note 1: This data sheet summarizes the features regions by implementing instruction caching, constant of the PIC32MX5XX/6XX/7XX family of data caching and instruction prefetching. devices. It is not intended to be a comprehensive reference source.
Page 126: Direct Memory Access (Dma) Controller
- Bytes need not be word-aligned at source Note 1: This data sheet summarizes the features and destination of the PIC32MX5XX/6XX/7XX family of • Fixed priority channel arbitration devices. It is not intended to be a • Flexible DMA channel operating modes: comprehensive reference source.
Page 128: Usb On-The-Go (Otg)
USB full-speed and low-speed communi- Note 1: This data sheet summarizes the features cation. The voltage comparators monitor the voltage on of the PIC32MX5XX/6XX/7XX family of the V pin to determine the state of the bus. The devices. It is not intended to be a transceiver provides the analog translation between comprehensive reference source.
Page 129 PIC32MX5XX/6XX/7XX FIGURE 11-1: PIC32MX5XX/6XX/7XX FAMILY USB INTERFACE DIAGRAM USBEN USB Suspend Oscillator 8 MHz Typical CPU Clock Not P TUN<5:0> Sleep Primary Oscillator Div x Div 2 UFRCEN OSC1 UPLLEN UPLLIDIV To Clock Generator for Core and Peripherals USB Suspend...
Page 130: I/O Ports
To add flexibility and functionality, some Note 1: This data sheet summarizes the features pins are multiplexed with alternate function(s). These of the PIC32MX5XX/6XX/7XX family of functions depend on which peripheral features are on devices. It is not intended to be a the device.
Page 131 The pull-ups are Setting the corresponding bit in the AD1PCFG register enabled by setting corresponding bit in CNPUE = 1 enables the pin as a digital pin. register. © 2010 Microchip Technology Inc. DS61156F-page 130...
Page 132: Timer1
16-bit timer that can operate Note 1: This data sheet summarizes the features as a free-running interval timer for various timing applica- of the PIC32MX5XX/6XX/7XX family of tions and counting external events. This timer can also devices. It is not intended to be a be used with the Low-Power Secondary Oscillator comprehensive reference source.
Page 134: Timer2/3, Timer4/5
Timer2 with Timer3 and Timer4 with Timer5. Note 1: This data sheet summarizes the features The 32-bit timers can operate in three modes: of the PIC32MX5XX/6XX/7XX family of • Synchronous internal 32-bit timer devices. It is not intended to be a •...
Page 135 ‘y’ in registers, TyCON, TMRy, PRy, TyIF, refers to either Timer3 or Timer5. 2: TxCK pins are not available on 64-pin devices. 3: ADC event trigger is available only on the Timer2/3 pair. © 2010 Microchip Technology Inc. DS61156F-page 134...
Page 136: Input Capture
- Capture timer value on every falling edge of Note 1: This data sheet summarizes the features input at ICx pin of the PIC32MX5XX/6XX/7XX family of - Capture timer value on every rising edge of devices. It is not intended to be a input at ICx pin comprehensive reference source.
Page 138: Output Compare
Note 1: This data sheet summarizes the features selected time base events. For all modes of operation, of the PIC32MX5XX/6XX/7XX family of the OCMP module compares the values stored in the devices. It is not intended to be a OCxR and/or the OCxRS registers to the value in the comprehensive reference source.
Page 140: Serial Peripheral Interface (Spi)
These peripheral devices may be Serial EEPROMs, Shift registers, dis- Note 1: This data sheet summarizes the features play drivers, A/D Converters, etc. The PIC32 SPI mod- of the PIC32MX5XX/6XX/7XX family of ® ule is compatible with Motorola SPI and SIOP devices.
Page 142: Inter-Integrated Circuit (I C™)
Figure 18-1 illustrates the C module block diagram. Note 1: This data sheet summarizes the features of the PIC32MX5XX/6XX/7XX family of Each I C module has a 2-pin interface: the SCLx pin is devices. It is not intended to be a clock and the SDAx pin is data.
Page 143 Bit Detect Write Start and Stop I2CxSTAT Bit Generation Read Collision Write Detect I2CxCON Acknowledge Read Generation Clock Stretching Write I2CxTRN Read Shift Clock Reload Control Write BRG Down Counter I2CxBRG Read PBCLK © 2010 Microchip Technology Inc. DS61156F-page 142...
Page 144: Universal Asynchronous Receiver Transmitter (Uart)
• One or two Stop bits Note 1: This data sheet summarizes the features • Hardware auto-baud feature of the PIC32MX5XX/6XX/7XX family of • Hardware flow control option devices. It is not intended to be a • Fully integrated Baud Rate Generator (BRG) with comprehensive reference source.
Page 145 8 into TxBUF Write to UxTXREG Pull from Buffer BCLK/16 (Shift Clock) UxTX Start Bit 0 Bit 1 Stop Start Bit 1 UxTXIF UTXISEL = 00 UxTXIF UTXISEL = 01 UxTXIF UTXISEL = 10 © 2010 Microchip Technology Inc. DS61156F-page 144...
Page 146: Parallel Master Port (Pmp)
• Up to 16 programmable address lines Note 1: This data sheet summarizes the features • Up to two Chip Select lines of the PIC32MX5XX/6XX/7XX family of • Programmable strobe options devices. It is not intended to be a - Individual read and write strobes, or comprehensive reference source.
Page 148: Real-Time Clock And Calendar (Rtcc)
• 24-hour format (military time) Note 1: This data sheet summarizes the features • Visibility of one-half second period of the PIC32MX5XX/6XX/7XX family of • Provides calendar: Weekday, date, month and devices. It is not intended to be a year comprehensive reference source.
Page 150: 10-Bit Analog-To-Digital Converter (Adc)
• Automatic Channel Scan mode Note 1: This data sheet summarizes the features • Selectable conversion trigger source of the PIC32MX5XX/6XX/7XX family of • 16-word conversion result buffer devices. It is not intended to be a • Selectable buffer fill modes comprehensive reference source.
Page 151 PIC32MX5XX/6XX/7XX FIGURE 22-2: ADC CONVERSION CLOCK PERIOD BLOCK DIAGRAM ADRC Div 2 ADCS<7:0> ADC Conversion Clock Multiplier 2, 4,..., 512 © 2010 Microchip Technology Inc. DS61156F-page 150...
Page 152: Controller Area Network (Can)
- Each FIFO can have up to 32 messages for a Note 1: This data sheet summarizes the features total of 1024 messages of the PIC32MX5XX/6XX/7XX family of - FIFO can be a transmit message FIFO or a devices. It is not intended to be a receive message FIFO comprehensive reference source.
Page 154: Ethernet Controller
• Supports 10/100 Mbps data transfer rates Note 1: This data sheet summarizes the features • Supports full-duplex and half-duplex operation of the PIC32MX5XX/6XX/7XX family of • Supports RMII and MII PHY interface devices. It is not intended to be a •...
Page 155 Carrier Sense – Receive Data Valid AERXD1 Receive Data ERXD0 Receive Data AERXERR Receive Error ERXD1 Receive Data ERXERR Receive Error Note: Ethernet controller pins that are not used by selected interface can be used by other peripherals. © 2010 Microchip Technology Inc. DS61156F-page 154...
Page 156: Comparator 1
Note 1: This data sheet summarizes the features configured in a variety of ways. of the PIC32MX5XX/6XX/7XX family of Following are some of the key features of this module: devices. It is not intended to be a •...
Page 158: Comparator Voltage Reference (Cv Ref )
Note 1: This data sheet summarizes the features of them. of the PIC32MX5XX/6XX/7XX family of devices. It is not intended to be a A block diagram of the module is illustrated in comprehensive reference source.
Page 160: Power-Saving Features
Sleep mode has the lowest power consumption of the This section describes power-saving features for the device power-saving operating modes. The CPU and PIC32MX5XX/6XX/7XX. The PIC32 devices offer a total most peripherals are Halted. Select peripherals can of nine methods and modes, organized into two...
Page 161 Idle. However, when switching back to appropriate and/or oscillator start-up/lock delays would be applied. The device enters Idle mode when the SLPEN bit (OSCCON<4>) is clear and a WAIT instruction is executed. © 2010 Microchip Technology Inc. DS61156F-page 160...
Page 162: Special Features
28.0 SPECIAL FEATURES Note: This data sheet summarizes the features of the PIC32MX5XX/6XX/7XX family of devices. However, it is not intended to be a comprehensive reference source. To complement the information in this data sheet, refer to Section 8. “Watchdog Timer and Power-up Timer”...
Page 163 BWP: Boot Flash Write-Protect bit Prevents boot Flash memory from being modified during code execution. 1 = Boot Flash is writable 0 = Boot Flash is not writable bit 23-20 Reserved: Write ‘ 1 ’ © 2010 Microchip Technology Inc. DS61156F-page 162...
Page 164 DEBUG<1:0>: Background Debugger Enable bits (forced to ‘ 11 ’ if code-protect is enabled) 11 = Debugger is disabled 10 = Debugger is enabled 01 = Reserved (same as ‘ 11 ’ setting) 00 = Reserved (same as ‘ 11 ’ setting) © 2010 Microchip Technology Inc. DS61156F-page 163...
Page 165 00010 = 1:4 00001 = 1:2 00000 = 1:1 All other combinations not shown result in operation = 10100 Note 1: Do not disable the P (POSCMOD = 11 ) when using this oscillator source. © 2010 Microchip Technology Inc. DS61156F-page 164...
Page 166 001 = Fast RC Oscillator with divide-by-N with PLL module (FRCDIV+PLL) 000 = Fast RC Oscillator (FRC) Note 1: Do not disable the P (POSCMOD = 11 ) when using this oscillator source. © 2010 Microchip Technology Inc. DS61156F-page 165...
Page 167 101 = 6x divider 100 = 5x divider 011 = 4x divider 010 = 3x divider 010 = 3x divider 001 = 2x divider 000 = 1x divider bit 7 Reserved: Write ‘ 1 ’ © 2010 Microchip Technology Inc. DS61156F-page 166...
Page 168 FPLLIDIV<2:0>: PLL Input Divider bits 111 = 12x divider 110 = 10x divider 101 = 6x divider 100 = 5x divider 011 = 4x divider 010 = 3x divider 001 = 2x divider 000 = 1x divider © 2010 Microchip Technology Inc. DS61156F-page 167...
Page 169 USERID<15:0>: This is a 16-bit value that is user-defined and is readable via ICSP™ and JTAG Note 1: This bit is Reserved and reads ‘ 1 ’ on PIC32MX664/675/695 devices. This bit is Reserved and reads ‘ 1 ’ on PIC32MX534/564/575 devices. © 2010 Microchip Technology Inc. DS61156F-page 168...
Page 170 -n = Bit Value at POR: (‘0’, ‘1’, x = Unknown) bit 31-28 VER<3:0>: Revision Identifier bits bit 27-0 DEVID<27:0>: Device ID Note 1: See the “PIC32 Flash Programming Specification” (DS61145) for a list of Revision and Device ID values. © 2010 Microchip Technology Inc. DS61156F-page 169...
Page 171 This section describes the operation of the WDT and • Configuration or software controlled Power-up Timer of the PIC32MX5XX/6XX/7XX. • User-configurable time-out period The WDT, when enabled, operates from the internal • Can wake the device from Sleep or Idle...
Page 172 28.3.3 POWER-UP REQUIREMENTS The on-chip regulator is designed to meet the power-up All PIC32MX5XX/6XX/7XX devices’ core and digital requirements for the device. If the application does not logic are designed to operate at a nominal 1.8V. To use the regulator, then strict power-up conditions must simplify system designs, most devices in the be adhered to.
Page 173 Programming and Diagnostics PIC32 devices incorporate two programming and diag- nostic modules, and a trace controller, that provide a PIC32MX5XX/6XX/7XX devices provide a complete range of functions to the application developer. range of programming and diagnostic features that can increase the flexibility of any application using them.
Page 174 0 = Disable the trace port bit 1 Reserved: Ignore read bit 0 TDOEN: TDO Enable for 2-Wire JTAG 1 = 2-wire JTAG protocol uses TDO 0 = 2-wire JTAG protocol does not use TDO © 2010 Microchip Technology Inc. DS61156F-page 173...
Page 176: Instruction Set
PIC32MX5XX/6XX/7XX 29.0 INSTRUCTION SET The PIC32MX5XX/6XX/7XX family instruction set complies with the MIPS32 Release 2 instruction set architecture. The PIC32 device family does not support the following features: • Core extend instructions • Coprocessor 1 instructions • Coprocessor 2 instructions ®...
Page 178: Development Support
MPLAB IDE supports multiple debugging tools in a single development paradigm, from the cost-effective simulators, through low-cost in-circuit debuggers, to full-featured emulators. This eliminates the learning curve when upgrading to tools with increased flexibility and power. © 2010 Microchip Technology Inc. DS61156F-page 177...
Page 179 • MPLAB IDE compatibility • Integration into MPLAB IDE projects • User-defined macros to streamline assembly code • Conditional assembly for multi-purpose source files • Directives that allow complete control over the assembly process © 2010 Microchip Technology Inc. DS61156F-page 178...
Page 180 MPLAB REAL ICE offers significant advantages over competitive emulators including low-cost, full-speed emulation, run-time variable watches, trace analysis, complex breakpoints, a ruggedized probe interface and long (up to three meters) interconnection cables. © 2010 Microchip Technology Inc. DS61156F-page 179...
Page 181 PC via an RS-232 or USB cable. The MPLAB PM3 has high-speed communications and optimized algorithms for quick programming of large memory devices and incorporates an MMC card for file storage and data applications. © 2010 Microchip Technology Inc. DS61156F-page 180...
Page 182: Electrical Characteristics
Absolute maximum ratings for the PIC32MX5XX/6XX/7XX devices are listed below. Exposure to these maximum rating conditions for extended periods may affect device reliability. Functional operation of the device at these or any other conditions, above the parameters indicated in the operation listings of this specification, is not implied.
Page 183 Power-on Reset Signal V/ µ s DC17 Rise Rate 0.00005 — 0.115 — to Ensure Internal Power-on Reset Signal Note 1: This is the limit to which V can be lowered without losing RAM data. © 2010 Microchip Technology Inc. DS61156F-page 182...
Page 184 Data in “Typical” column is at 3.3V, 25° C at specified operating frequency unless otherwise stated. Parameters are for design guidance only and are not tested. This parameter is characterized, but not tested in manufacturing. This information is preliminary. © 2010 Microchip Technology Inc. DS61156F-page 183...
Page 185 Data in “Typical” column is at 3.3V, 25° C unless otherwise stated. Parameters are for design guidance only and are not tested. This parameter is characterized, but not tested in manufacturing. This information is preliminary. © 2010 Microchip Technology Inc. DS61156F-page 184...
Page 186 Test conditions for ADC module differential current are as follows: Internal ADC RC oscillator enabled. Data is characterized at +70° C and not tested. Parameter is for design guidance only. This parameter is characterized, but not tested in manufacturing. This information is preliminary. © 2010 Microchip Technology Inc. DS61156F-page 185...
Page 187 Higher leakage current may be measured at different input voltages. Negative current is defined as current sourced by the pin. This parameter is characterized, but not tested in manufacturing. © 2010 Microchip Technology Inc. DS61156F-page 186...
Page 188 Arbitration mode is mode 1 (CPU has lowest priority). Refer to “PIC32 Flash Programming Specification” (DS61145) for operating conditions during programming and erase cycles. This parameter applies to PIC32MX534/564/664/764 devices only. This information is preliminary. © 2010 Microchip Technology Inc. DS61156F-page 187...
Page 189 Arbitration mode is mode 1 (CPU has lowest priority). Refer to “PIC32 Flash Programming Specification” (DS61145) for operating conditions during programming and erase cycles. This parameter applies to PIC32MX534/564/664/764 devices only. This information is preliminary. © 2010 Microchip Technology Inc. DS61156F-page 188...
Page 190 0.21 BGSEL<1:0> = 10 Note 1: Response time measured with one comparator input at (V – 1.5)/2, while the other input transitions from V to V These parameters are characterized but not tested. © 2010 Microchip Technology Inc. DS61156F-page 189...
Page 191 D320 Regulator Output Voltage 1.62 1.80 1.98 — CORE µ F D321 External Filter Capacitor Value — Capacitor must be low series resistance (1 ohm) D322 Power-up Timer Period — — — PWRT © 2010 Microchip Technology Inc. DS61156F-page 190...
Page 192 PIC32MX5XX/6XX/7XX 31.2 AC Characteristics and Timing Parameters The information contained in this section defines PIC32MX5XX/6XX/7XX AC characteristics and timing parameters. FIGURE 31-1: LOAD CONDITIONS FOR DEVICE TIMING SPECIFICATIONS Load Condition 1 – for all pins except OSC2 Load Condition 2 – for OSC2 = 464 Ω...
Page 193 PLL input requirements: 4 MH (use PLL prescaler to reduce F ). This parameter is PLLIN characterized, but tested at 10 MHz only at manufacturing. This parameter is characterized, but not tested in manufacturing. © 2010 Microchip Technology Inc. DS61156F-page 192...
Page 194 -40° C ≤ T ≤ +85° C for Industrial Operating temperature Param. Characteristics Min. Typical Max. Units Conditions LPRC @ 31.25 kHz LPRC — — Note 1: Change of LPRC frequency as V changes. © 2010 Microchip Technology Inc. DS61156F-page 193...
Page 195 CNx High or Low Time (input) — — — SYSCLK Note 1: Data in “Typical” column is at 3.3V, 25° C unless otherwise stated. This parameter is characterized, but not tested in manufacturing. © 2010 Microchip Technology Inc. DS61156F-page 194...
Page 196 SY00 SY10 (Note 1) Note 1: The power-up period will be extended if the power-up sequence completes before the device exits from BOR < V DDMIN 2: Includes interval voltage regulator stabilization delay. © 2010 Microchip Technology Inc. DS61156F-page 195...
Page 197 -40° C to +85° C Note 1: These parameters are characterized, but not tested in manufacturing. Data in “Typ” column is at 3.3V, 25° C unless otherwise stated. Characterized by design but not tested. © 2010 Microchip Technology Inc. DS61156F-page 196...
Page 198 Delay from External TxCK — — CKEXTMRL Clock Edge to Timer Increment Note 1: Timer1 is a Type A. This parameter is characterized, but not tested in manufacturing. N = Prescale Value (1, 8, 64, 256). © 2010 Microchip Technology Inc. DS61156F-page 197...
Page 199 Must also + 25 ns meet parameter IC15. IC15 ICx Input Period [(25 ns or 2 T )/N] — — + 50 ns Note 1: These parameters are characterized, but not tested in manufacturing. © 2010 Microchip Technology Inc. DS61156F-page 198...
Page 200 Note 1: These parameters are characterized, but not tested in manufacturing. Data in “Typical” column is at 3.3V, 25° C unless otherwise stated. Parameters are for design guidance only and are not tested. © 2010 Microchip Technology Inc. DS61156F-page 199...
Page 201 The minimum clock period for SCKx is 40 ns. Therefore, the clock generated in Master mode must not violate this specification. Assumes 50 pF load on all SPIx pins. © 2010 Microchip Technology Inc. DS61156F-page 200...
Page 202 The minimum clock period for SCKx is 40 ns. Therefore, the clock generated in Master mode must not violate this specification. Assumes 50 pF load on all SPIx pins. © 2010 Microchip Technology Inc. DS61156F-page 201...
Page 203 Data in “Typical” column is at 3.3V, 25° C unless otherwise stated. Parameters are for design guidance only and are not tested. The minimum clock period for SCKx is 40 ns. Assumes 50 pF load on all SPIx pins. © 2010 Microchip Technology Inc. DS61156F-page 202...
Page 204 Data in “Typical” column is at 3.3V, 25° C unless otherwise stated. Parameters are for design guidance only and are not tested. The minimum clock period for SCKx is 40 ns. Assumes 50 pF load on all SPIx pins. © 2010 Microchip Technology Inc. DS61156F-page 203...
Page 205 Data in “Typical” column is at 3.3V, 25° C unless otherwise stated. Parameters are for design guidance only and are not tested. The minimum clock period for SCKx is 40 ns. Assumes 50 pF load on all SPIx pins. © 2010 Microchip Technology Inc. DS61156F-page 204...
Page 206 FIGURE 31-15: I2Cx BUS DATA TIMING CHARACTERISTICS (MASTER MODE) IM20 IM21 IM11 IM10 SCLx IM11 IM26 IM10 IM33 IM25 SDAx IM45 IM40 IM40 SDAx Note: Refer to Figure 31-1 for load conditions. © 2010 Microchip Technology Inc. DS61156F-page 205...
Page 207 * (BRG + 2) — (Note 2) Note 1: BRG is the value of the I C™ Baud Rate Generator. Maximum pin capacitance = 10 pF for all I2Cx pins (for 1 MHz mode only). © 2010 Microchip Technology Inc. DS61156F-page 206...
Page 208 Bus Capacitive Loading — — Note 1: BRG is the value of the I C™ Baud Rate Generator. Maximum pin capacitance = 10 pF for all I2Cx pins (for 1 MHz mode only). © 2010 Microchip Technology Inc. DS61156F-page 207...
Page 209 FIGURE 31-17: I2Cx BUS DATA TIMING CHARACTERISTICS (SLAVE MODE) IS20 IS21 IS11 IS10 SCLx IS30 IS26 IS31 IS33 IS25 SDAx IS45 IS40 IS40 SDAx Note: Refer to Figure 31-1 for load conditions. © 2010 Microchip Technology Inc. DS61156F-page 208...
Page 210 Setup Time µ s 400 kHz mode — µ s 1 MHz mode — (Note 1) Note 1: Maximum pin capacitance = 10 pF for all I2Cx pins (for 1 MHz mode only). © 2010 Microchip Technology Inc. DS61156F-page 209...
Page 211 µ s 1 MHz mode — (Note 1) IS50 Bus Capacitive Loading — — Note 1: Maximum pin capacitance = 10 pF for all I2Cx pins (for 1 MHz mode only). © 2010 Microchip Technology Inc. DS61156F-page 210...
Page 212 Note 1: These parameters are characterized but not tested in manufacturing. Data in “Typ” column is at 3.3V, 25° C unless otherwise stated. Parameters are for design guidance only and are not tested. © 2010 Microchip Technology Inc. DS61156F-page 211...
Page 213 — — Delay RMII Timing Requirements ET11 Reference Clock Frequency — — — ET12 Reference Clock Duty Cycle — — ET13 ETXDx, ETEN, Delay — — ET14 ERXDx, ERXDV, ERXERR — — Delay © 2010 Microchip Technology Inc. DS61156F-page 212...
Page 214 These parameters are not characterized or tested in manufacturing. With no missing codes. These parameters are characterized, but not tested in manufacturing. Characterized with a 1 kHz sinewave. For PIC32MX534/564/664/764 devices, data provided in this table is preliminary. © 2010 Microchip Technology Inc. DS61156F-page 213...
Page 215 These parameters are not characterized or tested in manufacturing. With no missing codes. These parameters are characterized, but not tested in manufacturing. Characterized with a 1 kHz sinewave. For PIC32MX534/564/664/764 devices, data provided in this table is preliminary. © 2010 Microchip Technology Inc. DS61156F-page 214...
Page 216 -40° C to 3.6V +85° C ANx or V Note 1: External V - and V + pins must be used for correct operation. These parameters are characterized, but not tested in manufacturing. © 2010 Microchip Technology Inc. DS61156F-page 215...
Page 217 These parameters are characterized, but not tested in manufacturing. Because the sample caps will eventually lose charge, clock rates below 10 kHz can affect linearity performance, especially at elevated temperatures. Characterized by design but not tested. © 2010 Microchip Technology Inc. DS61156F-page 216...
Page 218 3 – Software clears ADxCON. SAMP to start conversion. 4 – Sampling ends, conversion sequence starts. 5 – Convert bit 9. 6 – Convert bit 8. 7 – Convert bit 0. 8 – One T for end of conversion. © 2010 Microchip Technology Inc. DS61156F-page 217...
Page 219 SAMP 7 – Begin conversion of next channel. of the “PIC32 Family Reference Manual (DS61132). 8 – Sample for time specified by SAMC<4:0>. 3 – Convert bit 9. 4 – Convert bit 8. © 2010 Microchip Technology Inc. DS61156F-page 218...
Page 220 CS Active Time + 40 — — — WR Active Time + 25 — — — RD Active Time + 25 — — — Note 1: These parameters are characterized, but not tested in manufacturing. © 2010 Microchip Technology Inc. DS61156F-page 219...
Page 221 — — — Valid (data setup time) PMRD or PMENB Inactive to Data In — — — DHOLD Invalid (data hold time) Note 1: These parameters are characterized, but not tested in manufacturing. © 2010 Microchip Technology Inc. DS61156F-page 220...
Page 222 PMENB goes Inactive (data setup time) PM13 PMWR or PMEMB Invalid to Data Out — — — — DVHOLD Invalid (data hold time) Note 1: These parameters are characterized, but not tested in manufacturing. © 2010 Microchip Technology Inc. DS61156F-page 221...
Page 223 USB321 V Voltage Output Low — connected to 3.6V 14.25 k Ω load USB322 V Voltage Output High — connected to ground Note 1: These parameters are characterized, but not tested in manufacturing. © 2010 Microchip Technology Inc. DS61156F-page 222...
Page 224 — — TDOZSTATE Falling TCK TRST Low Time — — TRSTLOW TAP Signals Rise/Fall Time, All — — — Input and Output Note 1: These parameters are characterized, but not tested in manufacturing. © 2010 Microchip Technology Inc. DS61156F-page 223...
Page 226: Packaging Information
In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. © 2010 Microchip Technology Inc. DS61156F-page 225...
Page 227 PIC32MX5XX/6XX/7XX 32.1 Package Marking Information (Continued) 64-Lead QFN (9x9x0.9 mm) Example XXXXXXXXXX PIC32MX575F XXXXXXXXXX 512H-80I/MR XXXXXXXXXX YYWWNNN 0510017 121-Lead XBGA (10x10x1.1 mm) Example XXXXXXXXXX PIC32MX575F XXXXXXXXXX 512H-80I/BG XXXXXXXXXX YYWWNNN 0510017 © 2010 Microchip Technology Inc. DS61156F-page 226...
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Page 229 PIC32MX5XX/6XX/7XX /HDG 3ODVWLF 7KLQ 4XDG )ODWSDFN 37 ± [[ PP %RG\ PP >74)3@ 1RWH )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWSZZZPLFURFKLSFRPSDFNDJLQJ © 2010 Microchip Technology Inc. DS61156F-page 228...
Page 230 'LPHQVLRQV ' DQG ( GR QRW LQFOXGH PROG IODVK RU SURWUXVLRQV 0ROG IODVK RU SURWUXVLRQV VKDOO QRW H[FHHG PP SHU VLGH 'LPHQVLRQLQJ DQG WROHUDQFLQJ SHU $60( <0 %6& %DVLF 'LPHQVLRQ 7KHRUHWLFDOO\ H[DFW YDOXH VKRZQ ZLWKRXW WROHUDQFHV 5() 5HIHUHQFH 'LPHQVLRQ XVXDOO\ ZLWKRXW WROHUDQFH IRU LQIRUPDWLRQ SXUSRVHV RQO\ 0LFURFKLS 7HFKQRORJ\ 'UDZLQJ &% © 2010 Microchip Technology Inc. DS61156F-page 229...
Page 231 PIC32MX5XX/6XX/7XX /HDG 3ODVWLF 7KLQ 4XDG )ODWSDFN 3) ± [[ PP %RG\ PP >74)3@ 1RWH )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWSZZZPLFURFKLSFRPSDFNDJLQJ © 2010 Microchip Technology Inc. DS61156F-page 230...
Page 232 'LPHQVLRQV ' DQG ( GR QRW LQFOXGH PROG IODVK RU SURWUXVLRQV 0ROG IODVK RU SURWUXVLRQV VKDOO QRW H[FHHG PP SHU VLGH 'LPHQVLRQLQJ DQG WROHUDQFLQJ SHU $60( <0 %6& %DVLF 'LPHQVLRQ 7KHRUHWLFDOO\ H[DFW YDOXH VKRZQ ZLWKRXW WROHUDQFHV 5() 5HIHUHQFH 'LPHQVLRQ XVXDOO\ ZLWKRXW WROHUDQFH IRU LQIRUPDWLRQ SXUSRVHV RQO\ 0LFURFKLS 7HFKQRORJ\ 'UDZLQJ &% © 2010 Microchip Technology Inc. DS61156F-page 231...
Page 233 PIC32MX5XX/6XX/7XX /HDG 3ODVWLF 7KLQ 4XDG )ODWSDFN 37 ± [[ PP %RG\ PP >74)3@ 1RWH )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWSZZZPLFURFKLSFRPSDFNDJLQJ © 2010 Microchip Technology Inc. DS61156F-page 232...
Page 234 PIC32MX5XX/6XX/7XX Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2010 Microchip Technology Inc. DS61156F-page 233...
Page 235 PIC32MX5XX/6XX/7XX Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2010 Microchip Technology Inc. DS61156F-page 234...
Page 236 PIC32MX5XX/6XX/7XX Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2010 Microchip Technology Inc. DS61156F-page 235...
Page 237 PIC32MX5XX/6XX/7XX Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2010 Microchip Technology Inc. DS61156F-page 236...
Page 238 PIC32MX5XX/6XX/7XX Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2010 Microchip Technology Inc. DS61156F-page 237...
Page 239 PIC32MX5XX/6XX/7XX Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2010 Microchip Technology Inc. DS61156F-page 238...
Page 240: Appendix A: Migrating From Pic32Mx3Xx/4Xx To Pic32Mx5Xx/6Xx/7Xx Devices
24 for migrating from PIC32MX3XX/4XX devices to the to 25. PIC32MX5XX/6XX/7XX family of devices. The code developed for the PIC32MX3XX/4XX devices can be ported to the PIC32MX5XX/6XX/7XX devices after making the appropriate changes outlined below.
Page 241: Appendix B: Revision History
- 100-pin TQFP: Pin 56 (D-/RG3) and Pin 57 (D+/RG2) 2.0 “Guidelines for Getting Started Removed the last sentence of 2.3.1 “Internal Regulator Mode” with 32-bit Microcontrollers” Removed Section 2.3.2 “External Regulator Mode” © 2010 Microchip Technology Inc. DS61156F-page 240...
Page 242 SP52 to SP35 between the MSb and Bit 14 on SDOx (see Figure 31-13). 32.0 “Packaging Information” Added the 121-pin XBGA package marking information and package details. “Product Identification System” Added the definition for BG (121-lead 10x10x1.1 mm, XBGA). Added the definition for Speed. © 2010 Microchip Technology Inc. DS61156F-page 241...
Page 243 28.0 “Special Features” Changed all references of POSCMD to POSCMOD in the Device Configuration Word 1 register (see Register 28-2). Appendix A: “Migrating from Added the new section Appendix PIC32MX3XX/4XX to PIC32MX5XX/6XX/7XX Devices” © 2010 Microchip Technology Inc. DS61156F-page 242...
Page 244 • PIC32MX534F064L • PIC32MX564F064L • PIC32MX564F128L Added the following devices to the Interrupt Register Map (Table 4-6): • PIC32MX664F064L • PIC32MX664F128L Added the following device to the Interrupt Register Map (Table 4-7): • PIC32MX764F128L © 2010 Microchip Technology Inc. DS61156F-page 243...
Page 245 • PIC32MX764F128H • PIC32MX534F064L • PIC32MX564F064L • PIC32MX564F128L • PIC32MX764F128L Added the following devices to the Ethernet Controller Register Map (Table 4-47): • PIC32MX664F064H • PIC32MX664F128H • PIC32MX764F128H • PIC32MX664F064L • PIC32MX664F128L • PIC32MX764F128L © 2010 Microchip Technology Inc. DS61156F-page 244...
Page 246 Updated the Typical and Maximum DC Characteristics: Power-Down Current (I Table 31-7. Added DC Characteristics: Program Memory parameters D130a and D132a in Table 31-11. Added the Internal Voltage Reference parameter (D305) to the Comparator Specifications in Table 31-13. © 2010 Microchip Technology Inc. DS61156F-page 245...
Page 247 Table 4-8 • Updated the All Resets values for the following registers in Table 4-11: I2C3CON, I2C4CON, I2C5CON and I2C1CON. • Updated the All Resets values for the I2C2CON register in Table 4-12 © 2010 Microchip Technology Inc. DS61156F-page 246...
Page 248 - Changed bits 27/11 in C1CON to CANBUSY - Changed bits 22/6-16/0 in C1VEC register to ICODE<6:0> - Changed bits 22/6-16/0 in C1TREC register to RERRCNT<7:0> - Changed bits 31/15-24/8 in C1TREC to TERRCNT<7:0> © 2010 Microchip Technology Inc. DS61156F-page 247...
Page 249 Table 31-19) Updated the following figures: • Figure 31-4 • Figure 31-9 • Figure 31-19 • Figure 31-20 Appendix A: “Migrating from Removed the A.3 Pin Assignments sub-section. PIC32MX3XX/4XX to PIC32MX5XX/ 6XX/7XX Devices” © 2010 Microchip Technology Inc. DS61156F-page 248...
Page 250 On-Chip Voltage Regulator........ 171 Layout................. 51 Microchip Internet Web Site..........251 Migration C Compilers PIC32MX3XX/4XX to PIC32MX5XX/6XX/7XX..239 MPLAB C18 .............. 178 MPLAB ASM30 Assembler, Linker, Librarian ....178 Clock Diagram ..............121 MPLAB Integrated Development Environment Software.. 177 Comparator MPLAB PM3 Device Programmer ........
Page 251 SPIx Slave Mode (CKE = 0)........202 SPIx Slave Mode (CKE = 1)........203 Timer1, 2, 3, 4, 5 External Clock....... 197 UART Reception ............144 UART Transmission (8-Bit or 9-Bit Data) ....144 © 2010 Microchip Technology Inc. DS61156F-page 250...
Page 252: The Microchip Web Site
To register, access the Microchip web site at www.microchip.com. Under “Support”, click “Customer Change Notification” and follow the registration instructions. © 2010 Microchip Technology Inc. DS61156F-page 251...
Page 253: Reader Response
4. What additions to the document do you think would enhance the structure and subject? 5. What deletions from the document could be made without affecting the overall usefulness? 6. Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? © 2010 Microchip Technology Inc. DS61156F-page 252...
Page 254: Product Identification System
MR = 64-Lead (9x9x0.9 mm) QFN (Plastic Quad Flat) BG = 121-Lead (10x10x1.1 mm) XBGA (Plastic Thin Profile Ball Grid Array) Pattern Three-digit QTP, SQTP, Code or Special Requirements (blank otherwise) ES = Engineering Sample © 2010 Microchip Technology Inc. DS61156F-page 253...
Page 255 Tel: 66-2-694-1351 Tel: 408-961-6444 Fax: 86-29-8833-7256 Fax: 66-2-694-1350 Fax: 408-961-6445 China - Xiamen Toronto Tel: 86-592-2388138 Mississauga, Ontario, Fax: 86-592-2388130 Canada Tel: 905-673-0699 China - Zhuhai Fax: 905-673-6509 Tel: 86-756-3210040 Fax: 86-756-3210049 08/04/10 © 2010 Microchip Technology Inc. DS61156F-page 254...

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