Addressing Example; Table 196: Access To The Process Images Of The Input And Output Data - Flags; Table 197: Arrangement Of The I/O Modules For The Addressing Example; Table 198: Addressing Example - WAGO 750-8207 Manual

254 Run-time System CODESYS 2.3
Table 196: Access to the Process Images of the Input and Output Data – Flags
Memory area
Flag variables
Retain variables
* The use of up to 250 I/O modules is possible with the WAGO internal data bus extension modules.
The total size of the memory for flag and retain variables is 128 kB (131060
bytes). The size of these two sections can be customized as required, provided
the total (permissible) size is not exceeded.
If you are using bit-oriented addressing, remember that the basic address is
word-based. The bits are addressed from 0 to 15.
8.8

Addressing Example

The following addressing example clarifies the access to the process image:

Table 197: Arrangement of the I/O Modules for the Addressing Example

Fieldbus controller

Table 198: Addressing Example

I/O module
Type C
1
750-400
2
1
750-554
2
1
2
750-402
3
4
1
750-504
2
Manual
Draft version 1.2.1 from 2017-09-13, valid from FW Version 02.06.20(09)
Description
Total of 128 kB remanent
memory (65536 words).
104 kB addressed by word via
MODBUS (53248 words)
6.5 kB addressed by bit via
MODBUS (3328 words).
Retain memory addressed by
symbols in the NVRAM: 128 kB
750-
400
1
Input data Output data
*
%IX8.0
%IX8.1
%QW0
%QW1
%IX8.2
%IX8.3
%IX8.4
%IX8.5
WAGO-I/O-SYSTEM 750
750-8207 PFC200 CS 2ETH RS 3G
Access via
PLC
Read/
Write
Read/
Write
Read/
Write
Read/
Write
750- 750- 750- 750-
554 402 504
2 3 4
Description
2DI, 24 V, 3 ms:
1. Digital input module with a data width of 2
bits. As the analog input modules already
occupy the first 8 words of the input process
image, the 2 bits occupy the lowest-value bits
of the 8th word.
2AO, 4 – 20 mA:
1. Analog output module with a data width of 2
words. This module occupies the first 2 words
in the output process image.
4DI, 24 V:
2. Digital input module with a data width of 4
bits. These are added to the 2 bits of the 750-
400 module and stored in the 8th word of the
input process image.
4DO, 24 V:
%QX4.0
1. Digital output module with a data width of 4
bits. As the analog output module already
%QX4.1
Logical Address Space
%MW0 to
%MW65535
Word (MODBUS)
%MW0 to %MW3327
Bit (MODBUS)
%MX0.0 ... %MX0.15 to
%MX3327.0 ...
%MX3327.15
-
750- 750- 750-
454 650 468 600
5 6 7 8