Other Interfaces - Altera cyclone V Technical Reference

28-8

Other Interfaces

•
f2h_dma_req0
•
f2h_dma_req1
•
f2h_dma_req2
•
f2h_dma_req3
•
f2h_dma_req4
•
f2h_dma_req5
•
f2h_dma_req6
•
f2h_dma_req7
Each of the DMA peripheral request interface contains the following three signals:
•
f2h_dma_req
•
f2h_dma_single
•
f2h_dma_ack
Related Information
DMA Controller
For details about the DMA Controller, refer to DMA controller chapter.
Other Interfaces
Related Information
Cortex-A9 MPCore
For more information, refer to Cortex-A9 MPU Subsystem .
MPU Standby and Event Interfaces
MPU standby signals are notification signals to the FPGA fabric that the MPU is in standby. Event signals
are used to wake up the Cortex-A9 processors from a wait for event (WFE) state. The following shows the
signals in the interface:
•
h2f_mpu_events
•
h2f_mpu_eventi
signal is used to wake up a processor that is in a Wait For Event state. Asserting this signal has the same
effect as executing the
FPGA fabric is powered-up and configured.
•
h2f_mpu_evento
signal is asserted when an SEV instruction is executed by one of the Cortex-A9 processors.
•
h2f_mpu_standbywfe[1:0]
•
h2f_mpu_standbywfi[1:0]
state
The MPU provides signals to indicate when it is in a standby state. These signals are available to custom
hardware designs in the FPGA fabric.
Related Information
Cortex-A9 MPCore
For more information, refer to Cortex-A9 MPU Subsystem .
Altera Corporation
—FPGA DMA controller peripheral request interface 0
—FPGA DMA controller peripheral request interface 1
—FPGA DMA controller peripheral request interface 2
—FPGA DMA controller peripheral request interface 3
—FPGA DMA controller peripheral request interface 4
—FPGA DMA controller peripheral request interface 5
—FPGA DMA controller peripheral request interface 6
—FPGA DMA controller peripheral request interface 7
—This signal is used to request burst transfer using the DMA
—This signal is used to request single word transfer using the DMA
—This signal indicates the DMA acknowledgment upon requests from the FPGA
on page 16-1
on page 9-4
—MPU standby and event interface, including the following signals.
—Sends an event from logic in the FPGA fabric to the MPU. This FPGA-to-HPS
instruction in the Cortex-A9. This signal must be de-asserted until the
SEV
—Sends an event from the MPU to logic in the FPGA fabric. This HPS-to-FPGA
—Indicates which Cortex-A9 processor is in the WFE state
—Indicates which Cortex-A9 processor is in the wait for interrupt (WFI)
on page 9-4
cv_5v4
2016.10.28
HPS Component Interfaces
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