Electrical Specifications; Power And Ground; Decoupling Recommendations; Connection Specifications - Intel 82496 CACHE CONTROLLER User Manual

CHAPTER 7
ELECTRICAL SPECIFICATIONS
7.1. POWER AND GROUND
For clean on-chip power distribution, the Pentium processor has 50 Vcc (power) and 49 Vss
(ground) inputs. The 82496 cache controller has 56 Vcc (power) and 67 Vss (ground) inputs
and the 82491 cache SRAM has 9 Vcc (power) and 9 Vss (ground) inputs. Power and ground
connections must be made to all external Vcc and Vss pins of the Pentium processor, 82496
cache controller, and 82491 cache SRAM. On the circuit board, all Vcc pins must be
connected to a V cc plane. All V ss pins must be connected to a V ss plane.
7.2. DECOUPLING RECOMMENDATIONS
Liberal decoupling capacitance should be placed near the Pentium processor and 82496 cache
controller/82491 cache SRAM second level cache. The CPU Cache Chip Set driving its large
address and data buses at high frequencies can cause transient power surges, particularly when
driving large capacitive loads.
Low inductance capacitors (i.e. surface mount capacitors) and interconnects are recommended
for best high frequency electrical performance. Inductance can be reduced by connecting
capacitors directly to the Vcc and Vss planes, with minimal trace length between the
component pads and vias to the plane. Capacitors specifically for PGA packages are also
commercially available.
These capacitors should be evenly distributed among each component. Capacitor values should
be chosen to ensure they eliminate both low and high frequency noise components.
7.3. CONNECTION SPECIFICATIONS
All NC pins must remain unconnected.
For reliable operation, always connect unused inputs to an appropriate signal level. Unused
active low inputs should be connected to Vcc. Unused active high inputs should be connected
to ground.
7.4. MAXIMUM RATINGS
Table 7-1 is a stress rating only. Functional operation at the maximums is not guaranteed.
Functional operating conditions are given in the A.C. and D.C. specification tables.
Extended exposure to the maximum ratings may affect device reliability. Furthermore,
although the Pentium processor, 82496 cache controller, and 82491 cache SRAM contain
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7-1