Pentium™ Processor Cpu-Cache Chip Set Internal Pull-Up Resistors; Pentium™ Processor Cpu-Cache Chip Set Internal Pull-Down Resistors; Pentium™ Processor Cpu-Cache Chip Set Glitch Free Pins - Intel 82496 CACHE CONTROLLER User Manual

PINOUTS
Table 1-11. Pentium™ Processor CPU-Cache Chip Set Internal Pull-Up Resistors
Pentium™ Processor 82496 Cache Controller 82491 Cache SRAM
BUSCHK# AOS# AOS#
RIS# BGT# BOFF#
SMI# CNA# HITM#
TCK DRCTM# MBE#
TDI FLUSH# MCLK
TMS KWENO# MFRZ#
TRST# MRO# MOCLK
NA# MZBT#
SNPCLK TCK
SNPSTB# TDI
SWENO# TMS
SYNC#
TCK
TOI
TMS
TRST#
NOTE:
Internal pull-up resistor values are approximately 25K to 1 OOK ohms.
Table 1-12. Pentium™ Processor CPU-Cache Chip Set Internal Pull-Down Resistors
Pentium™ Processor 82496 Cache Controller 82491 Cache SRAM
none none BLEC#
Table 1-13. Pentium™ Processor CPU-Cache Chip Set Glitch Free Pins
Pentium™ Processor 82496 Cache Controller 82491 Cache SRAM
APCHK# APERR#
MISTB#2
FERR# CAOS#
MOSTB#2
HLOA COTS#
MEOC#2
IERR# IPERR# MSEL#
LOCK# KLOCK#
MZBT#2
PCHK# MAPERR#
SNPAOS#
SNPCYC#
NOTES:
1. Glitch Free pins are always at a valid logic level following RESET.
2. These signals must be glitch free when the CSC is configured in strobed memory bus mode.
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