Eads - Intel 82496 CACHE CONTROLLER User Manual

Volume 2: 82496 cache controller and 82491 cache sram data book
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HARDWARE INTERFACE
5.2.2.48.
EADS#
EADS#
External CPU Address Strobe
Indicates a valid external address is being driven.
Output of 82496 Cache Controller (pin K16), Input to Pentium processor (pin M03)
Synchronous to ClK
Signal Description
EADS# indicates that a valid external address has been driven onto the Pentium processor
address pins by the 82496 Cache Controller. This address should be used to perform a Pentium
processor internal cache invalidation (!NV active) or inquire cycle.
When Sampled
EADS# is driven to the Pentium processor when the 82496 Cache Controller has the back-
invalidation or inquire address ready on the CPU address bus.
Relation to Other Signals
Pin Symbol
Relation to Other Signals
CFA,SET,TAG,AP
When EADS# is driven active to the CPU, the CPU address is also valid (CFA,
SET, TAG, AP).
5-92
I

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