Intel 82496 CACHE CONTROLLER User Manual page 324

HARDWARE INTERFACE
When Sampled
SNPNCA is sampled when SNPSTB# is sampled active. In synchronous snoop mode,
SNPNCA is sampled on the rising edge of the first CLK in which SNPSTB# becomes active.
In clocked mode, SNPNCA is sampled on the rising edge of the SNPCLK in which SNPSTB#
becomes active. In strobed mode, SNPNCA is sampled on the falling edge of SNPSTB#.
SNPNCA is only sampled with SNPSTB#. SNPSTB# may be qualified by CLK, SNPCLK, or
the falling edge of SNPSTB#, depending on the snoop mode, and must meet set-up and hold
times to the edge being sampled. When SNPSTB# is not asserted, SNPNCA is a "don't care"
signal and is not required to meet set-up and hold times.
Relation to Other Signals
Pin Symbol Relation to Other Signals
SNPINV When SNPINV is asserted, it overrides SNPNCA and places all snoop hit lines
into the [I] state.
SNPSTB# SNPNCA is sampled with SNPSTB#, which may be qualified by SNPClK or ClK,
depending on the snoop mode
I
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