Intel 82496 CACHE CONTROLLER User Manual page 372

Volume 2: 82496 cache controller and 82491 cache sram data book
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ELECTRICAL SPECIFICATIONS
Table 7-2. D.C. Specifications
Legend· PP=Pentiurn™ Processor CC=82496 Cache Controller CS-82491 Cache SRAM
,
,
-
Vee
=
5V
±
5%, TeASE
=
Oto +85·C
Symbol
Parameter
Min
Max
Unit
Notes
V IL
Input Low Voltage
-0.3
+0.8
V
TTL Level (6) (15)
VIH
Input High Voltage
2.0
Vcc+0.3
V
TTL Level (6) (15)
VOL
Output Low Voltage
0.45
V
TTL Level (1) (6)
V OH
Output High Voltage
2.4
V
TTL Level (2) (6)
Icc
Power Supply Current
3200
rnA
PP 66 MHz (7) (12)
2910
PP 60 MHz (13)
900
CC 66MHz (7), (4)
850
CC 60 MHz (7) (4)
400
CS 66 MHz (3), (9)
365
CS 60 MHz (3) (9)
III
Input Leakage Current
±15
uA
Os. VIN s. Vee (8)
ILO
Output Leakage Current
±15
uA
Os. VOUT s. Vee (8)
Tristate
IlL
Input Leakage Current
-400
uA
VIN = 0.45V, (5)
IIH
Input Leakage Current
200
uA
VIN = 2.4V, (10)
C IN
Input Capacitance
15
pF
PP, (11) (14)
11
pF
CC, (11) (14)
5
pF
CS, (11)(14)
Co
Output Capacitance
20
pF
PP, (11) (14)
22
pF
CC, (11) (14)
--
pF
CS, (11) (14)
CliO
I/O Capacitance
25
pF
PP, (11) (14)
17
pF
CC, (11) (14)
10
pF
CS, (11) (14)
C eLK
CLK Input Capacitance
7
pF
PP, (11) (14)
7
pF
CC, (11) (14)
7
pF
CS, (11) (14)
CTIN
Test Input Capacitance
15
pF
PP, (11) (14)
9
pF
CC, (11) (14)
5
pF
CS, (11) (14)
CTOUT
Test Output Capacitance
15
pF
PP, (11) (14)
14
pF
CC, (11) (14)
7
pF
CS, (11) (14)
CTCK
Test Clock Capacitance
7
pF
PP, (11) (14)
9
pF
CC, (11) (14)
5
pF
CS, (11) (14)
I
7-3

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