Hit - Intel 82496 CACHE CONTROLLER User Manual

Volume 2: 82496 cache controller and 82491 cache sram data book
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ntel
®
HARDWARE INTERFACE
5.2.2.55.
HIT#
HIT#
Hit to a CPU Cache Line
Indicates a hit to a line in the Pentium processor data or code caches.
Output from Pentium processor (pin W02)
Synchronous to ClK
Signal Description
Refer to the Pentium™ Processor Data Book for a detailed description of this signal.
I
5-101

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