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Electrical Specifications
2
Electrical Specifications
®
2.1
Intel
The processor provides an Intel QPI port for high speed serial transfer between other
Intel QPI-enabled components. The Intel QPI port consists of two unidirectional links
(for transmit and receive). Intel QPI uses a differential signalling scheme where pairs of
opposite-polarity (D_P, D_N) signals are used.
On-die termination (ODT) is provided on the processor silicon and termination is to V
Intel chipsets also provide ODT; thus, eliminating the need to terminate the Intel QPI
links on the system board.
Intel strongly recommends performing analog simulations of the Intel
Figure 2-1
Table
2-4. See
differential signal group.
Figure 2-1.
Active ODT for a Differential Link Example
2.2
Power and Ground Lands
For clean on-chip processor core power distribution, the processor has 210 VCC pads
and 119 VSS pads associated with V
V
; 28 VTTD pads and 17 VSS pads associated with V
TTA
pads associated with V
VCCPLL lands must be connected to their respective processor power planes, while all
VSS lands must be connected to the system ground plane. The processor VCC lands
must be supplied with the voltage determined by the processor Voltage IDentification
(VID) signals.
2.3
Decoupling Guidelines
Due to its large number of transistors and high internal clock speeds, the processor is
capable of generating large current swings between low and full power states. This may
cause voltages on power planes to sag below their minimum values if bulk decoupling is
not adequate. Larger bulk storage (C
current during longer lasting changes in current demand; such as, coming out of an idle
condition. Similarly, capacitors act as a storage well for current when entering an idle
condition from a running condition. Care must be taken in the baseboard design to
Intel® Xeon® Processor 3500 Series Datasheet Volume 1
QPI Differential Signaling
illustrates the active ODT. Signal listings are included in
Chapter 5
for the pin signal definitions. All Intel QPI signals are in the
T
X
R
R
TT
TT
; and 3 VCCPLL pads. All VCCP, VTTA, VTTD, VDDQ and
DDQ
Table 2-1
specifies the voltage level for the various VIDs.
Signal
Signal
R
TT
; 8 VTTA pads and 5 VSS pads associated with
CC
, 28 VDDQ pads and 17 VSS
TTD
), such as electrolytic capacitors, supply
BULK
®
QPI interface.
Table 2-3
and
R
X
R
TT
.
SS
13
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