Download Print this page

Intel 82496 CACHE CONTROLLER User Manual page 141

Volume 2: 82496 cache controller and 82491 cache sram data book

page of 480

/ 480
Contents
Table of Contents
Bookmarks

Table of Contents

Advertisement

HARDWARE INTERFACE

ClK

SNPSTB#

SNPCYC#

MTHIT#

MHITM#

SNPBSY#

ClK

SNPSTB#

SNPCYC#

MTHIT#

MHITM#

SNPBSY#

5-16

I

~I

I~I

101

I MI

I \3S' X I

7

I~I

IWI

I~

I

I

I~I

Figure 5-8. Fastest Synchronous Snooping

I

\Q.U

I

~I

I~

I~I

I WI

I'@

7

I'WI

i@i

1%\

I

IWI

Figure 5-9. Fastest Asynchronous Snooping

I STATE

E,S STATE

MSTATE

SNPSTB#

SNPINV

~

A"'~"\

~~"'~

&"-"0,~~W

MTHIT#

~

\:::.~'Z\

~

MHITM#

~

~

\'::;~

SNPBSY#

~

@J

'\:~

r

CDB1

Figure 5-10. Snoops without Invalidation

I~

I

"&

I

IW I

CDB36

I

~

I~

IBI

IW I

CDB37

I

Table of Contents

Advertisement

Chapters

Table of Contents

Related Products for Intel 82496 CACHE CONTROLLER

This manual is also suitable for:

82491 cache sram Pentium