Maoe - Intel 82496 CACHE CONTROLLER User Manual

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HARDWARE INTERFACE
5.2.2.76.
MAOE#
MAOE# Memory Address Output Enable
Tri-states or enables memory address outputs.
Input to 82496 Cache Controller (pin T05)
Asynchronous except during snoop cycles (See SNPSTB#)
Signal Description
The 82496 Cache Controller address latch is controlled by a latch enable input, MALE, and an
output enable input, MAOE#. MAOE# has two main functions. First, driving MAOE# active
enables the 82496 Cache Controller to drive the 82496 Cache Controller address lines (MSET,
MTAG, MCFA, MAP). Refer to Table 4-3 in section 4.2.7 for a table (by cache size) showing
which memory bus address signals are controlled by the MAOE# input. Second, MAOE# is a
qualifier for snoop cycles and must be inactive for a snoop request to be recognized by the
82496 Cache Controller.
In
general, MAOE# should be active if the 82496 Cache Controller is the current bus master.
When an 82496 Cache Controller gives up the bus, MAOE# should be inactive to float the
address lines and allow another bus master to generate a snoop request.
MAOE# controls the 82496 Cache Controller address output, except for the sub-line portion,
which has a separate output control (MBAOE#). MAOE# also provides the output enable for
the memory line address parity (MAP) latch.
When Sampled
MAOE# is an asynchronous input (except during snoop cycles) and always has full control
over the address output. For this reason, MAOE# must always be driven to a valid state.
The 82496 Cache Controller samples MAOE# to qualify snoop cycles.
If
MAOE# is sampled
active, the snoop is ignored. This allows SNPSTB# to share a common line for multiple C5Cs.
In synchronous snoop mode, MAOE# is sampled on the rising edge of the first CLK in which
SNPSTB# becomes active. In clocked mode, MAOE# is sampled on the rising edge of the first
SNPCLK in which SNPSTB# becomes active. In strobed mode, MAOE# is sampled on the
falling edge of SNPSTB#.
MAOE# is only sampled with SNPSTB#. SNPSTB# may be qualified by CLK, SNPCLK, or
the falling edge of SNPSTB#, depending on the snoop mode, and must meet set-up and hold
times to the edge being sampled. When SNPSTB# is not asserted, MAOE# is a "don't care"
signal and is not required to meet set-up and hold times.
MAOE# need not meet any set-up or hold time if it is not being sampled during a snoop cycle.
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