Intel 82496 CACHE CONTROLLER User Manual page 310

i
ntel
®
HARDWARE INTERFACE
5.2.2.120.
seve
SCVC Split Cycle
Indicates the current locked cycle is misaligned.
Output from Pentium processor (pin
R04).
Input to
82496
Cache Controller (pin
G16)
Synchronous to ClK
Signal Description
Refer to the Pentium
™
Processor Data Book for a detailed description of this signal.
I
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