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Intel 82496 CACHE CONTROLLER User Manual page 313

Volume 2: 82496 cache controller and 82491 cache sram data book
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HARDWARE INTERFACE
5.2.2.123.
SMI#
SMI#
System Power Management Interrupt
Latches a power interrupt request.
Input to Pentium processor (pin P18)
Asynchronous
Internal Pull-up
Signal Description
Refer to the Pentium™ Processor Data Book for a detailed description of this signal.
5-188
I

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