Microchip Technology PIC16C62B/72A Manual

Microchip Technology PIC16C62B/72A Manual

28-pin 8-bit cmos microcontrollers

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28-Pin 8-Bit CMOS Microcontrollers
Microcontroller Core Features:
• High-performance RISC CPU
• Only 35 single word instructions to learn
• All single cycle instructions except for program
branches, which are two cycle
• Operating speed: DC - 20 MHz clock input
DC - 200 ns instruction cycle
• 2K x 14 words of Program Memory,
128 x 8 bytes of Data Memory (RAM)
• Interrupt capability
• Eight level deep hardware stack
• Direct, indirect, and relative addressing modes
• Power-on Reset (POR)
• Power-up Timer (PWRT) and
Oscillator Start-up Timer (OST)
• Watchdog Timer (WDT) with its own on-chip RC
oscillator for reliable operation
• Brown-out detection circuitry for
Brown-out Reset (BOR)
• Programmable code-protection
• Power saving SLEEP mode
• Selectable oscillator options
• Low-power, high-speed CMOS EPROM
technology
• Fully static design
• In-Circuit Serial Programming(ICSP)
• Wide operating voltage range: 2.5V to 5.5V
• High Sink/Source Current 25/25 mA
• Commercial, Industrial and Extended temperature
ranges
• Low-power consumption:
- < 2 mA @ 5V, 4 MHz
- 22.5 A typical @ 3V, 32 kHz
- < 1 A typical standby current
 1998-2013 Microchip Technology Inc.
PIC16C62B/72A
Pin Diagram
SDIP, SOIC, SSOP, Windowed CERDIP
MCLR/V
RA0/AN0
RA1/AN1
RA2/AN2
RA3/AN3/V
REF
RA4/T0CKI
RA5/SS/AN4
V
OSC1/CLKIN
OSC2/CLKOUT
RC0/T1OSO/T1CKI
RC1/T1OSI
RC2/CCP1
RC3/SCK/SCL
Peripheral Features:
• Timer0: 8-bit timer/counter with 8-bit prescaler
• Timer1: 16-bit timer/counter with prescaler,
can be incremented during sleep via external
crystal/clock
• Timer2: 8-bit timer/counter with 8-bit period
register, prescaler and postscaler
• Capture, Compare, PWM module
• Capture is 16-bit, max. resolution is 12.5 ns,
Compare is 16-bit, max. resolution is 200 ns,
PWM maximum resolution is 10-bit
• 8-bit multi-channel Analog-to-Digital converter
• Synchronous Serial Port (SSP) with Enhanced
2
SPI and I
C
Preliminary
• 1
28
PP
2
27
3
26
4
25
5
24
6
23
7
22
8
21
SS
9
20
10
19
11
18
12
17
13
16
14
15
DS35008C-page 1
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0/INT
V
DD
V
SS
RC7
RC6
RC5/SDO
RC4/SDI/SDA

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Summary of Contents for Microchip Technology PIC16C62B/72A

  • Page 1 • Commercial, Industrial and Extended temperature  SPI and I ranges • Low-power consumption: - < 2 mA @ 5V, 4 MHz - 22.5 A typical @ 3V, 32 kHz - < 1 A typical standby current Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 1...
  • Page 2 POR, BOR (PWRT, OST) POR, BOR (PWRT, OST) Program Memory (14-bit words) Data Memory (bytes) Interrupts I/O Ports Ports A,B,C Ports A,B,C Timers Capture/Compare/PWM modules Serial Communications 8-bit Analog-to-Digital Module — 5 input channels Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 2...
  • Page 3: Table Of Contents

    Index ................................... 113 On-Line Support................................117 Reader Response ............................... 118 PIC16C62B/72A Product Identification System ......................119 To Our Valued Customers Most Current Data Sheet To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at: http://www.microchip.com...
  • Page 4 PIC16C62B/72A NOTES: Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 4...
  • Page 5: Device Overview

    OSC1/CLKIN Brown-out OSC2/CLKOUT Reset MCLR Timer0 Timer1 Timer2 Synchronous CCP1 Serial Port Note 1: Higher order bits are from the STATUS register. 2: The A/D module is not available on the PIC16C62B. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 5...
  • Page 6 2: This buffer is a Schmitt Trigger input when used in serial programming mode. 3: This buffer is a Schmitt Trigger input when configured in RC oscillator mode and a CMOS input otherwise. 4: The A/D module is not available on the PIC16C62B. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 6...
  • Page 7: Memory Organization

    Stack Level 1 (DS33023). Program Memory Organization Stack Level 8 The PIC16C62B/72A devices have a 13-bit program counter capable of addressing an 8K x 14 program memory space. Each device has 2K x 14 words of pro- Reset Vector 0000h gram memory.
  • Page 8 Registers — — Bank 0 Bank 1 Unimplemented data memory locations, read as '0'. Note 1: Not a physical register. 2: These registers are not implemented on the PIC16C62B, read as '0'. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 8...
  • Page 9 5: The IRP and RP1 bits are reserved. Always maintain these bits clear. 6: On any device reset, these pins are configured as inputs. 7: This is the value that will be in the port output latch. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 9...
  • Page 10 5: The IRP and RP1 bits are reserved. Always maintain these bits clear. 6: On any device reset, these pins are configured as inputs. 7: This is the value that will be in the port output latch. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 10...
  • Page 11 Note: For borrow, the polarity is reversed. A subtraction is executed by adding the two’s complement of the second operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low order bit of the source register. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 11...
  • Page 12 1 : 8 1 : 8 1 : 16 1 : 16 1 : 32 1 : 32 1 : 64 1 : 64 1 : 128 1 : 128 1 : 256 Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 12...
  • Page 13 RBIF: RB Port Change Interrupt Flag bit 1 = At least one of the RB7:RB4 input pins have changed state (clear by reading PORTB) 0 = None of the RB7:RB4 input pins have changed state Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 13...
  • Page 14 1 = Enables the TMR1 overflow interrupt 0 = Disables the TMR1 overflow interrupt Note 1: The PIC16C62B does not have an A/D module. This bit location is reserved on these devices. Always maintain this bit clear. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 14...
  • Page 15 1 = TMR1 register overflowed (must be cleared in software) 0 = TMR1 register did not overflow Note 1: The PIC16C62B does not have an A/D module. This bit location is reserved on these devices. Always maintain this bit clear. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 15...
  • Page 16 0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs) bit 0: BOR: Brown-out Reset Status bit 1 = No Brown-out Reset occurred 0 = A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs) Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 16...
  • Page 17 PUSHed or POPed. After the stack has been PUSHed eight times, the ninth push overwrites the value that was stored from the first push. The tenth push overwrites the second push (and so on). Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 17...
  • Page 18 100h 180h not used Data Memory 17Fh 1FFh Bank 0 Bank 1 Bank 2 Bank 3 Note 1: Maintain clear for upward compatibility with future products. 2: Not implemented. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 18...
  • Page 19: I/O Ports

    The user must ensure the bits in the TRISA register are Trigger maintained set when using them as analog inputs. input TRIS Latch buffer RD TRIS RD PORT TMR0 clock input Note 1: I/O pin has protection diodes to V only. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 19...
  • Page 20 Legend: x = unknown, u = unchanged, - = unimplemented locations read as '0'. Shaded cells are not used by PORTA. Note 1: The PIC16C62B does not implement the A/D module. Maintain this register clear. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 20...
  • Page 21 RB7:RB6 in serial programming mode Note 1: I/O pins have diode protection to V and V 2: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>). Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 21...
  • Page 22 TRISB PORTB Data Direction Register 1111 1111 1111 1111 OPTION_REG RBPU INTEDG T0CS T0SE 1111 1111 1111 1111 Legend: x = unknown, u = unchanged. Shaded cells are not used by PORTB. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 22...
  • Page 23 Note 1: I/O pins have diode protection to V and V 2: Port/Peripheral select signal selects between port data and peripheral output. 3: Peripheral OE (output enable) is only activated if peripheral select is active. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 23...
  • Page 24 Bit 3 Bit 2 Bit 1 Bit 0 POR, other resets PORTC xxxx xxxx uuuu uuuu TRISC PORTC Data Direction Register 1111 1111 1111 1111 Legend: x = unknown, u = unchanged. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 24...
  • Page 25: Timer0 Module

    PS2, PS1, PS0 flag bit T0IF T0CS on overflow Note 1: T0CS, T0SE, PSA, PS2:PS0 (OPTION_REG<5:0>). 2: The prescaler is shared with Watchdog Timer (refer to Figure 4-2 for detailed block diagram). Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 25...
  • Page 26 TRISA — — PORTA Data Direction Register --11 1111 --11 1111 Legend: x = unknown, u = unchanged, - = unimplemented locations read as '0'. Shaded cells are not used by Timer0. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 26...
  • Page 27: Timer1 Module

    TMR1CS: Timer1 Clock Source Select bit 1 = External clock from pin RC0/T1OSO/T1CKI (on the rising edge) 0 = Internal clock (F bit 0: TMR1ON: Timer1 On bit 1 = Enables Timer1 0 = Stops Timer1 Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 27...
  • Page 28 1, 2, 4, 8 T1OSCEN Enable Internal Oscillator RC1/T1OSI Clock SLEEP input T1CKPS1:T1CKPS0 TMR1CS Note 1: When the T1OSCEN bit is cleared, the inverter and feedback resistor are turned off. This eliminates power drain. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 28...
  • Page 29 T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON --00 0000 --uu uuuu T1CON — — Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by the Timer1 module. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 29...
  • Page 30 PIC16C62B/72A NOTES: Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 30...
  • Page 31: Timer2 Module

    1 = Timer2 is on 0 = Timer2 is off bit 1-0: T2CKPS1:T2CKPS0: Timer2 Clock Prescale Select bits 00 = Prescaler is 1 01 = Prescaler is 4 1x = Prescaler is 16 Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 31...
  • Page 32 TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000 T2CON — 1111 1111 1111 1111 Timer2 Period Register Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by the Timer2 module. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 32...
  • Page 33: Capture/Compare/Pwm (Ccp) Module

    1010 = Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin is unaffected) 1011 = Compare mode, trigger special event (CCP1IF bit is set; CCP1 resets TMR1 and starts an A/D conversion (if A/D module is enabled)) 11xx = PWM mode Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 33...
  • Page 34 When the Capture mode is changed, a false capture interrupt may be generated. The user should clear CCP1IE (PIE1<2>) before changing the capture mode to avoid false interrupts. Clear the interrupt flag bit, CCP1IE before setting CCP1IE. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 34...
  • Page 35 CCP1X CCP1Y CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000 Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by Capture and Timer1. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 35...
  • Page 36 TMR2 = Duty Cycle PWM period, the CCP1 pin will not be cleared. TMR2 = PR2 For an example PWM period and on-time calculation, ® see the PIC MCU Mid-Range Reference Manual, (DS33023). Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 36...
  • Page 37 CCP1X CCP1Y CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000 Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by PWM and Timer2. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 37...
  • Page 38 PIC16C62B/72A NOTES: Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 38...
  • Page 39: Synchronous Serial Port (Ssp) Module

    • Slave Select Mode (Slave mode only) To enable the serial port, SSP Enable bit, SSPEN (SSPCON<5>) must be set. To reset or reconfigure SPI mode, clear bit SSPEN, re-initialize the SSPCON reg- Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 39...
  • Page 40 PORTC Data Direction Register 1111 1111 1111 1111 Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by the SSP in SPI mode. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 40...
  • Page 41 The high and low times of the C specification, as well as the requirement of the SSP module, is shown in timing parameter #100, T , and HIGH parameter #101, T Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 41...
  • Page 42 Set bit SSPIF Generate ACK (SSP Interrupt occurs  SSPOV SSPSR SSPBUF Pulse if enabled) Note: Shaded cells show the conditions where the user software did not properly clear the overflow condition. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 42...
  • Page 43 SSPIF (PIR1<3>) Cleared in software Bus Master terminates transfer BF (SSPSTAT<0>) SSPBUF register is read SSPOV (SSPCON<6>) Bit SSPOV is set because the SSPBUF register is still full. ACK is not sent. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 43...
  • Page 44 BF (SSPSTAT<0>) From SSP interrupt SSPBUF is written in software service routine CKP (SSPCON<4>) Set bit after writing to SSPBUF (the SSPBUF must be written-to before the CKP bit can be set) Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 44...
  • Page 45 Legend: x = unknown, u = unchanged, - = unimplemented locations read as '0'. Shaded cells are not used by SSP module in SPI mode. Note 1: Maintain these bits clear in I C mode. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 45...
  • Page 46 1 = Receive complete, SSPBUF is full 0 = Receive not complete, SSPBUF is empty Transmit (I C mode only) 1 = Transmit in progress, SSPBUF is full 0 = Transmit complete, SSPBUF is empty Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 46...
  • Page 47 C firmware controlled master operation (slave idle) 1110 = I C slave mode, 7-bit address with start and stop bit interrupts enabled 1111 = I C slave mode, 10-bit address with start and stop bit interrupts enabled Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 47...
  • Page 48 PIC16C62B/72A NOTES: Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 48...
  • Page 49: Analog-To-Digital Converter (A/D) Module

    1: Unimplemented: Read as '0' bit 0: ADON: A/D On bit 1 = A/D converter module is operating 0 = A/D converter module is shutoff and consumes no operating current Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 49...
  • Page 50 ‘0’ - n = Value at POR reset bit 7-3: Unimplemented: Read as '0' bit 2-0: PCFG2:PCFG0: A/D Port Configuration Control bits PCFG2:PCFG0 A = Analog input D = Digital I/O Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 50...
  • Page 51 FIGURE 9-1: A/D BLOCK DIAGRAM CHS2:CHS0 RA5/AN4 (Input voltage) RA3/AN3/V RA2/AN2 Converter RA1/AN1 RA0/AN0 000 or 010 or 100 or (Reference 001 or voltage) 011 or PCFG2:PCFG0 Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 51...
  • Page 52 5 6 7 8 9 10 11 (k) EQUATION 9-1: ACQUISITION TIME Amplifier Settling Time + Hold Capacitor Charging Time + Temperature Coefficient COFF = 5S = - (51.2pF)(1k + R ) In(1/511) = (Temp -25C)(0.05S/C) COFF Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 52...
  • Page 53 4: When device frequency is greater than 1 MHz, the RC A/D conversion clock source is recommended for sleep operation only. 5: For extended voltage devices (LC), please refer to Electrical Specifications section. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 53...
  • Page 54 --11 1111 --11 1111 TRISA — — PORTA Data Direction Register Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used for A/D conversion. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 54...
  • Page 55: Special Features Of The Cpu

    With The PIC16C62B/72A devices have a host of features these two timers on-chip, most applications need no intended to maximize system reliability, minimize cost external reset circuitry.
  • Page 56 3: Rs may be required in HS mode, as well as XT mode, to avoid overdriving crystals with low drive level specification. 4: Oscillator performance should be verified when migrating between devices (including PIC16C62A to PIC16C62B and PIC16C72 to PIC16C72A) Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 56...
  • Page 57 The filter will ignore small pulses. However, Recommended values: a valid MCLR pulse must meet the minimum pulse Cext > 20pF width (TmcL, Specification #30). No internal reset source (WDT, BOR, POR) willdrive the MCLR pin low. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 57...
  • Page 58 OST/PWRT Chip_Reset 10-bit Ripple counter OSC1 PWRT On-chip 10-bit Ripple counter RC OSC Enable PWRT Enable OST Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 58...
  • Page 59 C in the event of MCLR/V pin break- regardless of the state of the PWRT configuration bit. down due to Electrostatic Discharge (ESD) or Electrical Overstress (EOS). Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 59...
  • Page 60 Legend: u = unchanged, x = unknown, - = unimplemented bit read as '0'. Note 1: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 60...
  • Page 61 3: See Table 10-5 for reset value for specific condition. 4: On any device reset, these pins are configured as inputs. 5: This is the value that will be in the port output latch. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 61...
  • Page 62 Wake-up (If in SLEEP mode) T0IF T0IE INTF INTE Interrupt to CPU ADIF RBIF ADIE RBIE SSPIF SSPIE PEIE CCP1IF CCP1IE TMR2IF TMR2IE TMR1IF TMR1IE Note 1: The A/D module is not implemented on the PIC16C62B. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 62...
  • Page 63 ;Save status to bank zero STATUS_TEMP register :(ISR) SWAPF STATUS_TEMP,W ;Swap STATUS_TEMP register into W ;(sets bank to original state) MOVWF STATUS ;Move W into STATUS register SWAPF W_TEMP,F ;Swap W_TEMP SWAPF W_TEMP,W ;Swap W_TEMP into W Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 63...
  • Page 64 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 2007h Config. bits WDTE FOSC1 FOSC0 BODEN PWRTE OPTION_REG RBPU INTEDG T0CS T0SE Legend: Shaded cells are not used by the Watchdog Timer. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 64...
  • Page 65 When the SLEEP instruction is being executed, the next instruction (PC + 1) is pre-fetched. For the device to wake-up through an interrupt event, the corresponding interrupt enable bit must be set (enabled). Wake-up is Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 65...
  • Page 66 This also allows the most recent firmware or a custom firmware to be programmed. For complete details of serial programming, please refer to the In-Circuit Serial Programming (ICSP™) Guide, DS30277. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 66...
  • Page 67: Instruction Set Summary

    In this case, the execution takes two instruction cycles with the second cycle executed as a NOP. One instruc- tion cycle consists of four oscillator periods. Thus, for an oscillator frequency of 4 MHz, the normal instruction Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 67...
  • Page 68 2: If this instruction is executed on the TMR0 register (and, where applicable, d = 1), the prescaler will be cleared if assigned to the Timer0 Module. 3: If Program Counter (PC) is modified or a conditional test is true, the instruction requires two cycles. The second cycle is executed as a NOP. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 68...
  • Page 69 Status Affected: None Description: The contents of W register are AND’ed with the eight bit literal 'k'. Description: Bit 'b' in register 'f' is set. The result is placed in the W register Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 69...
  • Page 70 Timer. It also resets the prescaler into PC bits <10:0>. The upper bits of of the WDT. Status bits TO and PD the PC are loaded from PCLATH. are set. CALL is a two cycle instruction. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 70...
  • Page 71 If the result is 0, a NOP is executed. If the result is 0, then a NOP is executed instead making it a 2T executed instead making it a 2T instruction instruction. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 71...
  • Page 72 If d = 0, destination is W reg- ister. If d = 1, the destination is file register f itself. d = 1 is useful to test a file register since status flag Z is affected. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 72...
  • Page 73 Time-out status bit, TO is set. Watchdog Timer and its pres- caler are cleared. The processor is put into SLEEP mode with the oscillator stopped. See Section 10.13 for more details. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 73...
  • Page 74 The upper and lower nibbles of regis- ter 'f' are exchanged. If 'd' is 0, the result is placed in W register. If 'd' is 1, the result is placed in register 'f'. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 74...
  • Page 75: Development Support

    MPLINK is a relocatable linker for MPASM and MPLAB-C17 and MPLAB-C18. It can link relocatable objects from assembly or C source files along with pre- compiled libraries using directives from a linker script. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 75...
  • Page 76 12.7 PICMASTER/PICMASTER CE and MPLAB-C18. • MPLINK allows all memory areas to be defined as The PICMASTER system from Microchip Technology is sections to provide link-time flexibility. a full-featured, professional quality emulator system. This flexible in-circuit emulator provides a high-quality,...
  • Page 77 12.15 PICDEM-3 Low-Cost PIC16CXXX with Microchip’s simulator MPLAB-SIM. Both SIMICE Demonstration Board and MPLAB-SIM run under Microchip Technology’s The PICDEM-3 is a simple demonstration board that MPLAB Integrated Development Environment (IDE) supports the PIC16C923 and PIC16C924 in the PLCC software. Specifically, SIMICE provides hardware sim- package.
  • Page 78 Microchips HCS Secure Data Products. The HCS eval- uation kit includes an LCD display to show changing codes, a decoder to decode transmissions, and a pro- gramming interface to program test transmitters. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 78...
  • Page 79 PIC16C62B/72A TABLE 12-1: DEVELOPMENT TOOLS FROM MICROCHIP Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 79...
  • Page 80 PIC16C62B/72A NOTES: Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 80...
  • Page 81: Electrical Characteristics

    This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 81...
  • Page 82 PIC16CXXX-20 4.5 V 4.0 V 3.5 V 3.0 V 2.5 V 2.0 V 20 MHz Frequency FIGURE 13-2: PIC16LC62B/72A AND PIC16C62B/72A/JW VOLTAGE-FREQUENCY GRAPH 6.0 V 5.5 V 5.0 V 4.5 V 4.0 V PIC16LCXXX-04 3.5 V 3.0 V 2.5 V 2.0 V...
  • Page 83 PIC16C62B/72A FIGURE 13-3: PIC16C62B/72A-04 VOLTAGE-FREQUENCY GRAPH 6.0 V 5.5 V 5.0 V PIC16CXXX-04 4.5 V 4.0 V 3.5 V 3.0 V 2.5 V 2.0 V 4 MHz Frequency Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 83...
  • Page 84 PIC16C62B/72A 13.1 DC Characteristics: PIC16C62B/72A-04 (Commercial, Industrial, Extended) PIC16C62B/72A-20 (Commercial, Industrial, Extended) Standard Operating Conditions (unless otherwise stated) 0°C  T  +70°C for commercial Operating temperature DC CHARACTERISTICS -40°C  T  +85°C for industrial -40°C  T +125°C for extended...
  • Page 85 I or I measurement. 7: This is the voltage where the device enters the Brown-out Reset. When BOR is enabled, the device will perform a brown-out reset when V falls below V Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 85...
  • Page 86 PIC16C62B/72A 13.3 DC Characteristics: PIC16C62B/72A-04 (Commercial, Industrial, Extended) PIC16C62B/72A-20 (Commercial, Industrial, Extended) PIC16LC62B/72A-04 (Commercial, Industrial) Standard Operating Conditions (unless otherwise stated) 0°C  T  +70°C for commercial Operating temperature -40°C  T  +85°C for industrial DC CHARACTERISTICS -40°C  T +125°C for extended...
  • Page 87 The specified levels represent normal operating conditions. Higher leakage current may be measured at different input volt- ages. 3: Negative current is defined as current sourced by the pin. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 87...
  • Page 88 Uppercase letters and their meanings: Fall Period High Rise Invalid (Hi-impedance) Valid Hi-impedance C only output access High High Bus free C specifications only) Hold Setup DATA input hold STOP condition START condition Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 88...
  • Page 89 LC parts operate for commercial/industrial temp’s only. FIGURE 13-4: LOAD CONDITIONS FOR DEVICE TIMING SPECIFICATIONS Load condition 1 Load condition 2 = 464 = 50 pF for all pins except OSC2/CLKOUT 15 pF for OSC2 output Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 89...
  • Page 90 All devices are tested to operate at "min." values with an external clock applied to the OSC1/CLKIN pin. When an external clock input is used, the "Max." cycle time limit is "DC" (no clock) for all devices. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 90...
  • Page 91 † Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. ††These parameters are asynchronous events not related to any internal clock edge. Note 1: Measurements are taken in RC Mode where CLKOUT output is 4 x T Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 91...
  • Page 92 (D005) * These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 92...
  • Page 93 7Tosc — These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 93...
  • Page 94 — * These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 94...
  • Page 95 † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: Specification 73A is only required if specifications 71A and 72A are used. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 95...
  • Page 96 † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: Specification 73A is only required if specifications 71A and 72A are used. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 96...
  • Page 97 † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: Specification 73A is only required if specifications 71A and 72A are used. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 97...
  • Page 98 † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: Specification 73A is only required if specifications 71A and 72A are used. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 98...
  • Page 99 4700 — — Setup time 400 kHz mode — — STOP condition 100 kHz mode 4000 — — Hold time 400 kHz mode — — These parameters are characterized but not tested. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 99...
  • Page 100 LOW period of the SCL signal, it must output the next data bit to the SDA line T max.+tsu;DAT = 1000 + 250 = 1250 ns (according to the standard-mode I C bus specification) before the SCL line is released. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 100...
  • Page 101 RA3 pin or V pin, whichever is selected as reference input. 3: The A/D conversion result never decreases with an increase in the Input Voltage and has no missing codes. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 101...
  • Page 102 † Data in “Typ” column is at 5V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: ADRES register may be read on the following T cycle. 2: See Section 9.1 for min conditions. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 102...
  • Page 103: Dc And Ac Characteristics Graphs And Tables

    Graphs and Tables not available at this time. Data is not available at this time but you may reference the PIC16C72 Series Data Sheet (DS39016,) DC and AC char- acteristic section, which contains data similar to what is expected. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 103...
  • Page 104 PIC16C62B/72A NOTES: Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 104...
  • Page 105: Packaging Information

    For OTP marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 105...
  • Page 106 Mold Draft Angle Bottom *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MO-095 Drawing No. C04-070 Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 106...
  • Page 107 Overall Row Spacing .345 .385 .425 8.76 9.78 10.80 Window Width .130 .140 .150 3.30 3.56 3.81 Window Length .290 .300 .310 7.37 7.62 7.87 *Controlling Parameter JEDEC Equivalent: MO-058 Drawing No. C04-080 Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 107...
  • Page 108 Mold Draft Angle Bottom *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-013 Drawing No. C04-052 Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 108...
  • Page 109 Mold Draft Angle Bottom *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-150 Drawing No. C04-073 Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 109...
  • Page 110 PIC16C62B/72A NOTES: Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 110...
  • Page 111: Appendix A: Revision History

    Basic SSP (2 mode SPI) SSP (4 mode SPI) CCP module CCP does not reset TMR1 when in special event trigger mode. Timer1 module Writing to TMR1L register can cause over- flow in TMR1H register. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 111...
  • Page 112: Appendix C: Migration From Base-Line To Mid-Range Devices

    Redefine data variables to reallocate them. isters are reset differently. Verify all writes to STATUS, OPTION, and FSR 10. Wake up from SLEEP through interrupt is registers since these have changed. added. Change reset vector to 0000h. Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 112...
  • Page 113: Index

    CCPR1L Register ..........9 INDF Register ............. 9 Enable (CCP1IE Bit) ..........14 Instruction Format ............. 67 Flag (CCP1IF Bit) ............15 RC2/CCP1 Pin ............. 6 Timer Resources ............33 Timing Diagram ............94 Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 113...
  • Page 114 Global Interrupt Enable (GIE Bit) ......13 TMR2IE Bit ..............14 Interrupt on Change (RB7:RB4) Pinout Descriptions Enable (RBIE Bit) ..........13 PIC16C62B/PIC16C72A ..........6 Peripheral Interrupt Enable (PEIE Bit) ....... 13 Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 114...
  • Page 115 Block Diagram ............26 Synchronous Serial Port Enable (SSPEN Bit) ..47 Rate Select (PS2:PS0 Bits) ........ 12 Switching Between Timer0 and WDT ......26 Prescaler, Timer1 .............. 28 Select (T1CKPS1:T1CKPS0 Bits)....... 27 Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 115...
  • Page 116 RA4/T0CKI Pin, External Clock ........6 Timing Diagram ............92 Timing Diagram ............93 WDT Reset, Normal Operation ....57 TMR0 Register ............. 9 WDT Reset, SLEEP ........57 WWW, On-Line Support ............3 Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 116...
  • Page 117: On-Line Support

    To register, access the Microchip web site at www.microchip.com. Under “Support”, click “Customer Change Notification” and follow the registration instructions.  1998-2013 Microchip Technology Inc. DS35008C-page 117...
  • Page 118: Reader Response

    4. What additions to the document do you think would enhance the structure and subject? 5. What deletions from the document could be made without affecting the overall usefulness? 6. Is there any incorrect or misleading information (what and where)? 7. How would you improve this document?  1998-2013 Microchip Technology Inc. DS35008C-page 118...
  • Page 119: Pic16C62B/72A Product Identification System

    PIC16C62B/72A PIC16C62B/72A PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery refer to the factory or the listed sales office. Examples PART NO. -XX X /XX XXX Pattern: QTP, SQTP, Code or Special Requirements PIC16C72A-04/P 301 Commercial Temp.,...
  • Page 120 PIC16C62B/72A Preliminary  1913 Microchip Technology Inc. DS35008C-page 120...
  • Page 121 Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA and Z-Scale are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. GestIC and ULPP are registered trademarks of Microchip Technology Germany II GmbH &...
  • Page 122 Thailand - Bangkok Tel: 86-29-8833-7252 Tel: 66-2-694-1351 Toronto Fax: 86-29-8833-7256 Fax: 66-2-694-1350 Mississauga, Ontario, Canada China - Xiamen Tel: 905-673-0699 Tel: 86-592-2388138 Fax: 905-673-6509 Fax: 86-592-2388130 China - Zhuhai Tel: 86-756-3210040 11/29/12 Fax: 86-756-3210049 Preliminary  1998-2013 Microchip Technology Inc. DS35008C-page 122...
  • Page 123 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Microchip PIC16LC72A-04/SO PIC16LC72A-04/SP PIC16LC72A-04/SS PIC16LC62B-04I/ML PIC16LC62B-04I/SP PIC16LC62B-04I/SS PIC16LC62B-04I/SO PIC16LC62B-04/SO PIC16LC62B-04/SP PIC16LC62B-04/SS PIC16LC62BT-04I/SS PIC16LC62BT-04I/SO PIC16LC72AT-04/SS PIC16LC72AT-04/SO PIC16LC62BT-04I/ML PIC16LC72A-04I/SP PIC16LC72A-04I/SS PIC16LC72A-04I/SO PIC16LC72A-04I/ML PIC16C62B-20I/SP PIC16LC62BT-04/SS PIC16LC62BT-04/SO PIC16LC72AT-04I/ML PIC16LC72AT-04I/SO PIC16LC72AT-04I/SS...

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