Table Of Contents - Holtek HT32F52220 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F52220/HT32F52230

Table of Contents

1 Introduction ........................................................................................................... 17
Overview .............................................................................................................................. 17
Features ............................................................................................................................... 18
Device Information ............................................................................................................... 21
Block Diagram ..................................................................................................................... 22
2 Document Conventions ....................................................................................... 23
3 System Architecture ............................................................................................. 24
Arm ® Cortex ® -M0+ Processor .............................................................................................. 24
Bus Architecture ................................................................................................................... 25
Memory Organization .......................................................................................................... 26
Memory Map ................................................................................................................................... 27
Embedded Flash Memory ............................................................................................................... 29
Embedded SRAM Memory ............................................................................................................. 29
AHB Peripherals ............................................................................................................................. 29
APB Peripherals ............................................................................................................................. 29
4 Flash Memory Controller (FMC) .......................................................................... 30
Introduction .......................................................................................................................... 30
Features ............................................................................................................................... 30
Functional Descriptions ....................................................................................................... 31
Flash Memory Map ......................................................................................................................... 31
Flash Memory Architecture ............................................................................................................. 32
Wait State Setting ........................................................................................................................... 32
Booting Configuration ..................................................................................................................... 33
Page Erase ..................................................................................................................................... 34
Mass Erase ..................................................................................................................................... 35
Word Programming ......................................................................................................................... 36
Option Byte Description .................................................................................................................. 37
Page Erase/Program Protection ..................................................................................................... 38
Security Protection .......................................................................................................................... 39
Register Map ....................................................................................................................... 40
Register Descriptions ........................................................................................................... 41
Flash Target Address Register - TADR ......................................................................................... 41
Flash Write Data Register - WRDR .............................................................................................. 42
Flash Operation Command Register - OCMR .............................................................................. 43
Flash Operation Control Register - OPCR .................................................................................... 44
Flash Operation Interrupt Enable Register - OIER ....................................................................... 45
Flash Operation Interrupt and Status Register - OISR ................................................................. 46
Flash Page Erase/Program Protection Status Register - PPSR ................................................... 48
Flash Security Protection Status Register - CPSR ....................................................................... 49
Rev. 1.10 2 of 366 November 09, 2018