32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F52220/HT32F52230
Output Stage
The SCTM output has functions for compare match, single pulse or PWM output. The channel
output SCTM_CHO is controlled by the CHOM, CHP and CHE bits in the corresponding
CHOCFR, CHPOLR and CHCTR registers.
CNTR
CHCCR
f
CLKIN
Figure 75. Output Stage Block Diagram
Channel Output Reference Signal
When the SCTM is used in the compare match output mode, the CHOREF signal (Channel Output
Reference signal) is defined by the CHOM bit setup. The CHOREF signal has several types of
output function which defines what happens to the output when the counter value matches the
contents of the CHCCR register. In addition to the low, high and toggle CHOREF output types,
there are also PWM mode 1 and PWM mode 2 outputs. In these modes, the CHOREF signal level
is changed according to the relationship between the counter value and the CHCCR content. There
are also two modes which will force the output into an inactive or active state irrespective of the
CHCCR content or counter values. With regard to a more detailed description refer to the relative
bit definition. The accompanying Table 34 shows a summary of the output type setup.
Table 34. Compare Match Output Setup
CHOM value
Rev. 1.10
CHOREF
Output Mode
Controller
CHOM
0x00
No change
0x01
Clear Output to 0
0x02
Set Output to 1
0x03
Toggle Output
0x04
Force Inactive Level
0x05
Force Active Level
0x06
PWM Mode 1
0x07
PWM Mode 2
250 of 366
Output Enable
Controller
CHP
CHE
Compare Match Level
SCTM_CHO
CHOREF
CHCMP Event
November 09, 2018
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