Holtek HT32F52220 User Manual page 218

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F52220/HT32F52230
Bits Field
[5] CH2IMAE
[4] CH2PRE
[8][2:0] CH2OM[3:0] Channel 2 Output Mode Setting
Rev. 1.10
Descriptions
Channel 2 Immediate Active Enable
0: No action
1: Single pulse Immediate Active Mode is enabled
The CH2OREF will be forced to the compare matched level immediately after an
available trigger event occurs irrespective of the result of the comparison between
the CNTR and the CH2CCR values.
The effective duration ends automatically at the next overflow or underflow event.
Note: The CH2IMAE bit is available only if the channel 2 is configured to be operated
in the PWM mode 1 or the PWM mode 2.
Channel 2 Capture/Compare Register (CH2CCR) Preload Enable
0: CH2CCR preload function is disabled.
The CH2CCR register can be immediately assigned a new value when
the CH2PRE bit is cleared to 0 and the updated CH2CCR value is used
immediately.
1: CH2CCR preload function is enabled
The new CH2CCR value will not be transferred to its shadow register until the
update event occurs.
These bits define the functional types of the output reference signal CH2OREF.
0000: No Change
0001: Output 0 on compare match
0010: Output 1 on compare match
0011: Output toggles on compare match
0100: Force inactive – CH2OREF is forced to 0
0101: Force active – CH2OREF is forced to 1
0110: PWM mode 1
- During up-counting, channel 2 has an active level when CNTR <
CH2CCR or otherwise has an inactive level.
- During down-counting, channel 2 has an inactive level when CNTR >
CH2CCR or otherwise has an active level.
0111: PWM mode 2
- During up-counting, channel 2 has an inactive level when CNTR <
CH2CCR or otherwise has an active level.
- During down-counting, channel 2 has an active level when CNTR >
CH2CCR or otherwise has an inactive level.
1110: Asymmetric PWM mode 1
- During up-counting, channel 2 has an active level when CNTR <
CH2CCR or otherwise has an inactive level.
- During down-counting, channel 2 has an inactive level when CNTR >
CH2ACR or otherwise has an active level.
1111: Asymmetric PWM mode 2
- During up-counting, channel 2 has an inactive level when CNTR <
CH2CCR or otherwise has an active level.
- During down-counting, channel 2 has an active level when CNTR >
CH2ACR or otherwise has an inactive level
Note: When channel 2 is used as asymmetric PWM output mode, the Counter Mode
Selection bit in Counter Configuration Register must be configured as Center-
aligned Counting mode (CMSEL = 01/02/03)
218 of 366 November 09, 2018