Page Erase; Figure 8. Page Erase Operation Flowchart - Holtek HT32F52220 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F52220/HT32F52230

Page Erase

The FMC provides a page erase function which is used to initialize the contents of the specific
Flash memory page. Each page can be erased independently without affecting the contents of other
pages. The following steps show the access sequence of the register for a page erase operation.
▄
Check the OPCR register to confirm that no Flash memory operation is in progress (OPM [3:0]
equal to 0xE or 0x6). Otherwise, wait until the previous operation has been finished.
▄
Write the page address to the TADR register.
▄
Write the page erase command to the OCMR register (CMD [3:0] = 0x8).
▄
Commit the page erase command to the FMC by setting the OPCR register (set OPM [3:0]=0xA).
▄
Wait until all the operations have been completed by checking the OPCR register value (OPM
[3:0] equals to 0xE).
▄
Read and verify the page if required.
Note that a correct target page address must be confirmed. The software may run out of control
if the target erase page is being used to fetch code or access data. The FMC will not provide any
notification when this happens. Additionally, the page erase operation will be ignored on the
protected pages. A Flash Operation Error interrupt will be triggered by the FMC if the OREIEN bit
in the OIER register is set. The software can check the PPEF bit in the OISR register to detect this
condition in the interrupt handler. The following figure shows the page erase operation flow.

Figure 8. Page Erase Operation Flowchart

Rev. 1.10
Start
No
Is OPM equal to 0xE or 0x6 ?
Yes
Set TADR, OCMR
Commit command
by setting OPCR
No
Is OPM equal to 0xE ?
Yes
Finish
34 of 366 November 09, 2018