32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F52220/HT32F52230
SPI FIFO Status Register – SPIFSR
This register contains the relevant SPI FIFO status.
Offset:
0x01C
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Type/Reset
RO
0 RO
Bits
Field
[7:4]
RXFS
[3:0]
TXFS
Rev. 1.10
30
29
28
22
21
20
14
13
12
6
5
4
RXFS
0 RO
0 RO
Descriptions
RX FIFO Status
0000: RX FIFO empty
0001: RX FIFO contains 1 data
...
1000: RX FIFO contains 8 data
Others: Reserved
TX FIFO Status
0000: TX FIFO empty
0001: TX FIFO contains 1 data
...
1000: TX FIFO contains 8 data
Others: Reserved
324 of 366
27
26
Reserved
19
18
Reserved
11
10
Reserved
3
2
0 RO
0 RO
0 RO
25
24
17
16
9
8
1
0
TXFS
0 RO
0
November 09, 2018
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