Apb Peripheral Clock Selection Register 0 - Apbpcsr0 - Holtek HT32F52220 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F52220/HT32F52230
APB Peripheral Clock Selection Register 0 – APBPCSR0
This register specifies the APB peripheral clock prescaler selection.
Offset: 0x038
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Type/Reset
Bits Field
[29:28] URPCLK
[25:24] USRPCLK
[21:20] GPTMPCLK
[13:12] BFTMPCLK
[5:4] SPIPCLK
Rev. 1.10
30 29
Reserved URPCLK
RW 0 RW
22 21
Reserved GPTMPCLK
RW 0 RW
14 13
Reserved BFTMPCLK
RW 0 RW
6 5
Reserved SPIPCLK
RW 0 RW
Descriptions
UART Peripheral Clock Selection
00: PCLK = CK_AHB
01: PCLK = CK_AHB / 2
10: PCLK = CK_AHB / 4
11: PCLK = CK_AHB / 8
PCLK = Peripheral Clock; CK_AHB = AHB and CPU clock
USART Peripheral Clock Selection
00: PCLK = CK_AHB
01: PCLK = CK_AHB / 2
10: PCLK = CK_AHB / 4
11: PCLK = CK_AHB / 8
PCLK = Peripheral Clock; CK_AHB = AHB and CPU clock
GPTM Peripheral Clock Selection
00: PCLK = CK_AHB
01: PCLK = CK_AHB / 2
10: PCLK = CK_AHB / 4
11: PCLK = CK_AHB / 8
PCLK = Peripheral Clock; CK_AHB = AHB and CPU clock
BFTM Peripheral Clock Selection
00: PCLK = CK_AHB
01: PCLK = CK_AHB / 2
10: PCLK = CK_AHB / 4
11: PCLK = CK_AHB / 8
PCLK = Peripheral Clock; CK_AHB = AHB and CPU clock
SPI Peripheral Clock Selection
00: PCLK = CK_AHB
01: PCLK = CK_AHB / 2
10: PCLK = CK_AHB / 4
11: PCLK = CK_AHB / 8
PCLK = Peripheral Clock; CK_AHB = AHB and CPU clock
91 of 366
28 27 26
Reserved
0
20 19 18
Reserved
0
12 11 10
0
4 3 2
Reserved
0
25 24
USRPCLK
RW 0 RW 0
17 16
9 8
Reserved
1 0
I2CPCLK
RW 0 RW 0
November 09, 2018