Watchdog Timer (Wdt); Introduction; Features; Figure 80. Watchdog Timer Block Diagram - Holtek HT32F52220 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F52220/HT32F52230
16

Watchdog Timer (WDT)

Introduction

The Watchdog timer is a hardware timing circuitry that can be used to detect a system lock-up due
to software trapped in a deadlock. The Watchdog timer can operate in a reset mode. The Watchdog
timer will generate a reset when the counter counts down to a zero value. Therefore, the software
should reload the counter value before a Watchdog timer underflow occurs. In addition, a reset will
also be generated if the software reloads the counter before it reaches a delta value. That means
that the Watchdog timer prevents a software deadlock that continuously triggers the Watchdog, the
reload must occur when the Watchdog timer value has a value within a limited window of 0 and
WDTD. The Watchdog timer counter can be stopped when the processor is in the debug or sleep
mode. The register write protection function can be enabled to prevent an unexpected change in the
Watchdog timer configuration.
WDTRS
RSKEY[15:0]
Clear
CK_WDT
LSI RC 32kHz
WDTEN

Figure 80. Watchdog Timer Block Diagram

Features

▄
Clock source from internal 32 kHz RC oscillator – LSI
▄
Can be independently setup to keep running or to stop when entering the sleep or deep sleep
mode 1
▄
12-bit down counter with 3-bit prescaler structure
▄
Provides reset to the system
▄
Limited reload window setup function for custom Watchdog timer reload times
▄
Watchdog Timer may be stopped when the processor is in the debug mode
▄
Reload lock key to prevent unexpected operation
▄
Configuration register write protection function for counter value, reset enable, delta value, and
prescaler
Rev. 1.10
WDTV
Reload
Prescaler
12-bit Down
1 /2 /4
Counter
/8.../128
WDTD
WPSC[2:0]
269 of 366
Underflow
WDTUF
WDTRSTEN
WDTERR
Read WDTSR Register
WDT Error
November 09, 2018
WDT_RSTn