Apb Peripheral Reset Register 1 - Apbprstr1 - Holtek HT32F52220 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F52220/HT32F52230
APB Peripheral Reset Register 1 – APBPRSTR1
This register specifies several APB peripherals software reset control bits.
Offset: 0x10C
Reset value: 0x0000_0000
31
Reserved SCTM1RST SCTM0RST
Type/Reset
23
Type/Reset
15
Type/Reset
7
Reserved
Type/Reset
Bits Field
[29] SCTM1RST
[28] SCTM0RST
[24] ADCRST
[16] BFTMRST
[8] GPTMRST
[4] WDTRST
Rev. 1.10
30 29 28
RW 0 RW
22 21 20
Reserved
14 13 12
Reserved
6 5 4
WDTRST
RW
Descriptions
SCTM1 Reset Control
0: No reset
1: Reset SCTM1
This bit is set by software and cleared to 0 by hardware automatically.
SCTM0 Reset Control
0: No reset
1: Reset SCTM0
This bit is set by software and cleared to 0 by hardware automatically.
A/D Converter Reset Control
0: No reset
1: Reset A/D Converter
This bit is set by software and cleared to 0 by hardware automatically.
BFTM Reset Control
0: No reset
1: Reset BFTM
This bit is set by software and cleared to 0 by hardware automatically.
GPTM Reset Control
0: No reset
1: Reset GPTM
This bit is set by software and cleared to 0 by hardware automatically.
Watchdog Timer Reset Control
0: No reset
1: Reset Watchdog Timer
This bit is set by software and cleared to 0 by hardware automatically.
103 of 366
27 26
Reserved
0
19 18
11 10
3 2
Reserved
0
25 24
ADCRST
RW 0
17 16
BFTMRST
RW 0
9 8
GPTMRST
RW 0
1 0
November 09, 2018