Adc Interrupt Enable Register - Adcier - Holtek HT32F52220 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F52220/HT32F52230
ADC Interrupt Enable Register – ADCIER
This register contains the ADC interrupt enable bits.
Offset: 0x080
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Type/Reset
Bits Field
[24] ADIEO
[17] ADIEU
[16] ADIEL
[2] ADIEC
[1] ADIEG
[0] ADIES
Rev. 1.10
30 29 28
Reserved
22 21 20
Reserved
14 13 12
6 5 4
Reserved
Descriptions
ADC Data Register Overwrite Interrupt enable
0: ADC data register overwrite interrupt is disabled
1: ADC data register overwrite interrupt is enabled
ADC Watchdog Upper Threshold Interrupt enable
0: ADC watchdog upper threshold interrupt is disabled
1: ADC watchdog upper threshold interrupt is enabled
ADC Watchdog Lower Threshold Interrupt enable
0: ADC watchdog lower threshold interrupt is disabled
1: ADC watchdog lower threshold interrupt is enabled
ADC Cycle EOC Interrupt enable
0: ADC cycle end of conversion interrupt is disabled
1: ADC cycle end of conversion interrupt is enabled
ADC Subgroup EOC Interrupt enable
0: ADC subgroup end of conversion interrupt is disabled
1: ADC subgroup end of conversion interrupt is enabled
ADC Single EOC Interrupt enable
0: ADC single end of conversion interrupt is disabled
1: ADC single end of conversion interrupt is enabled
171 of 366
27 26
19 18
ADIEU
RW
11 10
Reserved
3 2
ADIEC ADIEG
RW 0 RW
November 09, 2018
25 24
ADIEO
RW 0
17 16
ADIEL
0 RW 0
9 8
1 0
ADIES
0 RW 0