32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F52220/HT32F52230
Functional Description
The BFTM is a 32-bit up-counting counter which is driven by the BFTM APB clock, PCLK. The
counter value can be changed or read at any time even when the timer is counting. The BFTM
supports two operating modes known as the repetitive mode and one shot mode allowing the
measurement of time intervals or the generation of periodic time durations.
Repetitive Mode
The BFTM counts up from zero to a specific compare value which is pre-defined by the
BFTMCMPR register. When the BFTM operates in the repetitive mode and the counter reaches
a value equal to the specific compare value in the BFTMCMPR register, the timer will generate a
compare match event signal, MIF. When this occurs, the counter will be reset to 0 and resume its
counting operation. When the MIF signal is generated, a BFTM compare match interrupt will also
be generated periodically if the compare match interrupt is enabled by setting the corresponding
interrupt control bit, MIEN, to 1. The counter value will remain unchanged and the counter will
stop counting if it is disabled by clearing the CEN bit to 0.
0xFFFF_FFFF
CMP
CNT
MIF
CEN
Figure 60. BFTM – Repetitive Mode
Rev. 1.10
: Updated by software
237 of 366
: Cleared by software
November 09, 2018
Keep counter value
when CEN is reset
Time
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