Holtek HT32F52220 User Manual page 97

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F52220/HT32F52230
Bits Field
[8] DBUSR
[6] DBGPTM
[3] DBWDT
[2] DBPD
[1] DBDSLP1
[0] DBSLP
Rev. 1.10
Descriptions
USART Debug Mode Enable
0: Same behavior as in normal mode
1: USART FIFO timeout is frozen when the core is halted
Set and reset by software.
GPTM Debug Mode Enable
0: GPTM counter continues to count even if the core is halted
1: GPTM counter stops counting when the core is halted
Set and reset by software.
Watchdog Timer Debug Mode Enable
0: Watchdog Timer counter continues to count even if the core is halted
1: Watchdog Timer counter stops counting when the core is halted
Set and reset by software.
Debug Power-Down Mode
0: LDO = Off, FCLK = Off, and HCLK = Off in Power-Down mode
1: LDO = On, FCLK = On, and HCLK = On in Power-Down mode
Set and reset by software.
Debug Deep-Sleep1
0: LDO = Low power mode, FCLK = Off, and HCLK = Off in Deep-Sleep1
1: LDO = On, FCLK = On, and HCLK = On in Deep-Sleep1
Set and reset by software.
Debug Sleep Mode
0: LDO = On, FCLK = On, and HCLK = Off in Sleep mode
1: LDO = On, FCLK = On, and HCLK = On in Sleep mode
Set and reset by software.
97 of 366 November 09, 2018