32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F52220/HT32F52230
Alternate Function
Up to sixteen alternative functions can be chosen for each I/O pad by setting the PxCFGn [3:0]
field in the GPxCFGLR or GPxCFGHR (n = 0~15, x = A~ B) registers. If the pin is selected as an
unavailable item which is noted as a "N/A" item in the "Alternate Function Mapping" table in the
device datasheet, this pin will be defined as default alternate function. Please refer to the "Alternate
Function Mapping" table in the device datasheet for the detailed mapping of the alternate function
I/O pins. In addition to this flexible I/O multiplexing architecture, each peripheral has alternate
functions mapped onto different I/O pins to optimize the number of peripherals available in smaller
packages. The following description shows the setting of the PxCFGn [3:0] field.
▄
PxCFGn [3:0] = 0000: The default alternated function (after reset, AF0)
▄
PxCFGn [3:0] = 0001: Alternate Function 1 (AF1)
▄
PxCFGn [3:0] = 0010: Alternate Function 2 (AF2)
.......
▄
PxCFGn [3:0] = 1110: Alternate Function 14 (AF14)
▄
PxCFGn [3:0] = 1111: Alternate Function 15 (AF15)
Table 22. AFIO Selection for Peripheral Map Example
AF0
AF1 AF2 AF3
System
GPIO ADC
N/A
Default
Lock Mechanism
The device also offers a lock function to lock the AFIO configuration using the GPIO lock register,
PxLOCKR, until a reset event occurs. Refer to the GPIO Locking Mechanism section in the GPIO
chapter for more details.
Register Map
The following table shows the AFIO registers and reset value.
Table 23. AFIO Register Map
Register
ESSR0
ESSR1
GPACFGLR
GPACFGHR
GPBCFGLR
GPBCFGHR
Rev. 1.10
AF4
AF5
AF6
AF7 AF8 AF9 AF10 AF11 AF12 AF13 AF14
USART
GPTM
SPI
I
2
C
/UART
Offset
0x000
EXTI Source Selection Register 0
0x004
EXTI Source Selection Register 1
0x020
GPIO Port A AFIO Configuration Register 0
0x024
GPIO Port A AFIO Configuration Register 1
0x028
GPIO Port B AFIO Configuration Register 0
0x02C
GPIO Port B AFIO Configuration Register 1
132 of 366
N/A
N/A
N/A
N/A
N/A
Description
AF15
System
SCTM
N/A
Other
Reset Value
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
November 09, 2018
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