Port A Lock Register - Palockr - Holtek HT32F52220 User Manual

32-bit microcontroller with arm cortex-m0+ core
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32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F52220/HT32F52230
Port A Lock Register – PALOCKR
This register specifies the GPIO Port A lock configuration.
Offset:
0x018
Reset value: 0x0000_0000
31
Type/Reset
RW
0 RW
23
Type/Reset
RW
0 RW
15
Type/Reset
RW
0 RW
7
Type/Reset
RW
0 RW
Bits
Field
[31:16]
PALKEY
[15:12], [9],
PALOCKn
[7:0]
Rev. 1.10
30
29
28
0 RW
0 RW
22
21
20
0 RW
0 RW
14
13
12
PALOCK
0 RW
0 RW
6
5
4
0 RW
0 RW
Descriptions
GPIO Port A Lock Key
0x5FA0: Port A Lock function is enable
Others: Port A Lock function is disable
To lock the Port A function, a value 0x5FA0 should be written into the PALKEY field
in this register. To execute a successful write operation on this lock register, the
value written into the PALKEY field must be 0x5FA0. If the value written into this
field is not equal to 0x5FA0, any write operations on the PALOCKR register will be
aborted. The result of a read operation on the PALKEY field returns the GPIO Port
A Lock Status which indicates whether the GPIO Port A is locked or not. If the read
value of the PALKEY field is 0, this indicates that the GPIO Port A Lock function is
disabled. Otherwise, it indicates that the GPIO Port A Lock function is enabled as
the read value is equal to 1.
GPIO Port A Pin n Lock Control Bits (n = 0 ~ 7, 9, 12 ~ 15)
0: Port A Pin n is not locked
1: Port A Pin n is locked
The PALOCKn bits are used to lock the configurations of corresponding GPIO Pins
when the correct Lock Key is applied to the PALKEY field. The locked configurations
including PADIRn, PAINENn, PAPUn, PAPDn, PAODn and PADVn setting in the
related GPIO registers. Additionally, the GPACFGHR or GPACFGLR field which is
used to configure the alternative function of the associated GPIO pin will also be
locked. Note that the PALOCKR can only be written once which means that PALKEY
and PALOCKn (lock control bit) should be written together and can not be changed
until a system reset or GPIO Port A reset occurs.
114 of 366
27
26
PALKEY
0 RW
0 RW
0 RW
19
18
PALKEY
0 RW
0 RW
0 RW
11
10
Reserved
0
RW
3
2
PALOCK
0 RW
0 RW
0 RW
25
24
0 RW
0
17
16
0 RW
0
9
8
PALOCK
Reserved
0
1
0
0 RW
0
November 09, 2018

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Ht32f52230

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