32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F52220/HT32F52230
BFTM Counter Register – BFTMCNTR
This register specifies the BFTM counter value.
Offset:
0x008
Reset value: 0x0000_0000
31
Type/Reset
RW
0 RW
23
Type/Reset
RW
0 RW
15
Type/Reset
RW
0 RW
7
Type/Reset
RW
0 RW
Bits
Field
[31:0]
CNT
BFTM Compare Value Register – BFTMCMPR
The register specifies the BFTM compare value.
Offset:
0x00C
Reset value: 0xFFFF_FFFF
31
Type/Reset
RW
1 RW
23
Type/Reset
RW
1 RW
15
Type/Reset
RW
1 RW
7
Type/Reset
RW
1 RW
Bits
Field
[31:0]
CMP
Rev. 1.10
30
29
28
0 RW
0 RW
22
21
20
0 RW
0 RW
14
13
12
0 RW
0 RW
6
5
4
0 RW
0 RW
Descriptions
BFTM Counter Value
A 32-bit BFTM counter value is stored in this field which can be read or written on-
the-fly.
30
29
28
1 RW
1 RW
22
21
20
1 RW
1 RW
14
13
12
1 RW
1 RW
6
5
4
1 RW
1 RW
Descriptions
BFTM Compare Value
This register specifies a 32-bit BFTM compare value which is used for comparison
with the BFTM counter value.
241 of 366
27
26
CNT
0 RW
0 RW
0 RW
19
18
CNT
0 RW
0 RW
0 RW
11
10
CNT
0 RW
0 RW
0 RW
3
2
CNT
0 RW
0 RW
0 RW
27
26
CMP
1 RW
1 RW
1 RW
19
18
CMP
1 RW
1 RW
1 RW
11
10
CMP
1 RW
1 RW
1 RW
3
2
CMP
1 RW
1 RW
1 RW
25
24
0 RW
0
17
16
0 RW
0
9
8
0 RW
0
1
0
0 RW
0
25
24
1 RW
1
17
16
1 RW
1
9
8
1 RW
1
1
0
1 RW
1
November 09, 2018
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