32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F52220/HT32F52230
Word Programming
The FMC provides a 32-bit word programming function which is used to modify the specific Flash
memory word contents. The following steps show the word programming operation register access
sequence.
▄
Check the OPCR register to confirm that no Flash memory operation is in progress (OPM [3:0]
equal to 0xE, or 0x6). Otherwise, wait until the previous operation has been finished.
▄
Write the word address to the TADR register. Write the word data to the WRDR register.
▄
Write the word program command to the OCMR register (CMD [3:0] = 0x4).
▄
Commit the word program command to the FMC by setting the OPCR register (set OPM [3:0]=0xA).
▄
Wait until all operations have been finished by checking the value of the OPCR register (OPM
[3:0] equals to 0xE).
▄
Read and verify the Flash memory if required.
Note that the word programming operation can not be applied to the same address twice.
Successive word programming operations to the same address must be separated by a page erase
operation. Additionally, the word programming operation will be ignored on protected pages.
A Flash operation error interrupt will be triggered by the FMC if the OREIEN bit in the OIER
register is set. The software can check the PPEF bit in the OISR register to detect this condition in
the interrupt handler. The following figure shows the word programming operation flow.
Figure 10. Word Programming Operation Flowchart
Rev. 1.10
Start
No
Is OPM equal to 0xE or 0x6 ?
Yes
Set TADR, WRDR
and OCMR
Commit command
by setting OPCR
No
Is OPM equal to 0xE ?
Yes
Finish
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November 09, 2018
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