Features; Functional Descriptions; Default Gpio Pin Configuration; General Purpose I/O - Gpio - Holtek HT32F52220 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F52220/HT32F52230

Features

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Input/output direction control
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Schmitt Trigger Input function enable control
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Input weak pull-up/pull-down control
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Output push-pull/open drain enable control
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Output set/reset control
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Output drive current selection
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External interrupt with programmable trigger edge – using EXTI configuration registers
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Analog input/output configurations – using AFIO configuration registers
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Alternate function input/output configurations – using AFIO configuration registers
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Port configuration lock

Functional Descriptions

Default GPIO Pin Configuration

During or just after the reset period, the alternative functions are all inactive and the GPIO ports
are configured into the input disable floating mode, i.e. input disabled without pull-up/pull-down
resistors. Only the boot and Serial-Wired Debug pins which are pin-shared with the I/O pins are
active after a device reset.
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PA9_BOOT: Input enable with internal pull-up
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SWCLK: Input enable with internal pull-up
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SWDIO: Input enable with internal pull-up
General Purpose I/O – GPIO
The GPIO pins can be configured as inputs or outputs via the data direction control registers
PxDIRCR (where x = A ~ B). When the GPIO pins are configured as input pins, the data on the
external pads can be read if the enable bits in the input enable function register PxINER are set.
The GPIO pull-up/pull-down registers PxPUR/PxPDR can be configured to fit specific applications.
When the pull-up and pull-down functions are both enabled, the pull-up function has the higher
priority while the pull-down function will be blocked until the pull-up function is released.
The GPIO pins can be configured as output pins where the output data is latched into the data
register PxDOUTR. The output type can be setup to be either push-pull or open-drain by the
open drain selection register PxODR. Only one or several specific bits of the output data will be
set or reset by configuring the port output set and reset control register PxSRR or the port output
reset control register PxRR without affecting the unselected bits. As the port output set and reset
functions are both enabled, the port output set function has the higher priority and the port output
reset function will be blocked. The output driving current of the GPIO pins can be selected by
configuring the drive current selection register PxDRVR.
Rev. 1.10 105 of 366 November 09, 2018