32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F52220/HT32F52230
Register Descriptions
Port A Data Direction Control Register – PADIRCR
This register is used to control the direction of the GPIO Port A pin as input or output.
Offset:
0x000
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
RW
0 RW
7
Type/Reset
RW
0 RW
Bits
Field
[15:12], [9],
PADIRn
[7:0]
Rev. 1.10
30
29
28
22
21
20
14
13
12
PADIR
0 RW
0 RW
6
5
4
0 RW
0 RW
Descriptions
GPIO Port A pin n Direction Control Bits (n = 0 ~ 7, 9, 12 ~ 15)
0: Pin n is input mode
1: Pin n is output mode
108 of 366
27
26
Reserved
19
18
Reserved
11
10
Reserved
0
RW
3
2
PADIR
0 RW
0 RW
0 RW
25
24
17
16
9
8
PADIR
Reserved
0
1
0
0 RW
0
November 09, 2018
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