Figure 57. Uart0,1 Block Diagram; Figure 58. Uart Character Frame - Wiznet W7500 Reference Manual

APB interface
Register
Block
UARTCLK
UARTn Interrupt
Interrupt
Control &
Status
Figure 58 shows the UART character frame
1
0
n
W7500 Datasheet Version1.0.0
UART
Read data[11:0]
Write data[7:0]
32x8
transmit
FIFO
Control and Status
Baud rate divisor
Baud rate
generator
FIFO flags
UARTTXINTR
UARTRXINTR
UARTMSINTR
FIFO status and Interrupt
UARTRTINTR
UARTEINTR
UARTINTR

Figure 57. UART0,1 Block diagram

LSB
5-8 data bits
Start

Figure 58. UART character frame

txd[7:0]
rxd[11:0]
Baud16
Receive
Transmit
FIFO
FIFO
status
status
1-2
MSB
Stop bits
Parity bit,
if enabled
32x12
receive
FIFO
UARTTXD
Transmitter
UARTRXD
Receiver
nUARTRI
nUARTCTS
nUARTDSR
nUARTDCD
nUARTDTR
nUARTRTS
nUARTOut1
nUARTOut2
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