Pb_09 Pad Control Register; Pb_10 Pad Control Register - Wiznet W7500 Reference Manual

Internet offload processor

Hide thumbs Also See for W7500:

Table of Contents

Address offset : 0x064

Reset value : 0x0000_0030

[1:0] PB09_PUPD – Pull-up, Pull-down selection register of Pad PB_09

These bits are written by S/W.

00 : Neither

01 : pull-down

10 : pull-up

11 : Neither

[2] PB09_DS – Driving strength selection register of Pad PB_09

0 : Low driving strength

1 : High driving strength

[5] PB09_IE : Input buffer enable selection register of Pad PB_09

0 : Input buffer disable

1 : Input buffer enable

[6] PB09_CS – CMOS input or Summit trigger input selection register of Pad PB_09

0 : CMOS input buffer

1 : Summit trigger input buffer

Address offset : 0x068

Reset value : 0x0000_0030

[1:0] PB10_PUPD – Pull-up, Pull-down selection register of Pad PB_10

These bits are written by S/W.

W7500 Datasheet Version1.0.0

PB_09 pad control register