Watchdog Timer Control Register(Wdtcontrol); Watchdog Timer Interrupt Clear Register (Wdtintclr); Watchdog Timer Raw Interrupt Status Register (Wdtris) - Wiznet W7500 Reference Manual

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20.4.3 Watchdog timer Control Register(WDTControl)

Address offset : 0x008

Reset value : 0x0000_0000

[0] IEN – Interrupt Enable.

0 : Disable the counter and the interrupt.

1 : Enable the counter and the interrupt. Reloads the counter from the

[1] REN – Reset Request Enable.

0 : Disable watchdog reset output.

1 : Enable watchdog reset output.

Address offset : 0x00C

[0] WIC – Watchdog timer Interrupt Clear

A write of 1 to this register clears the watchdog interrupt, and reloads the

counter from the value in WDTLoad.

20.4.5 Watchdog timer Raw Interrupt Status Register

Address offset : 0x010

Reset value : 0x0000_0000

W7500 Datasheet Version1.0.0

value in WDTLoad, after previously being disabled.