Channel-0 Pwm Output Enable And External Input Enable Register; (Pwmch0Peeer); Channel-0 Capture Mode Register (Pwmch0Cmr); Channel-0 Capture Register (Pwmch0Cr) - Wiznet W7500 Reference Manual

Internet offload processor

Hide thumbs Also See for W7500:

Table of Contents

Channel-0 PWM output Enable and External input Enable

Base address : 0x4000_5000

Address offset : 0x28

Reset value : 0x0000_0000

[1:0] PEEE – PWM output Enable and External input Enable

00 : PWM output is disable and external input is disable.

01 : PWM output is disable and external input is enable.

10 : PWM output is enable and external input is disable.

Base address : 0x4000_5000

Address offset : 0x2C

Reset value : 0x0000_0000

[0] CM – Capture mode

0 : Timer/Counter is captured when external input signal is rising edge.

1 : Timer/Counter is captured when external input signal is falling edge.

Base address : 0x4000_5000

Address offset : 0x30

W7500 Datasheet Version1.0.0