Wiznet W7500 Reference Manual page 11

15.3 Functional description ................................................................... 232
15.3.1 Masked access ...................................................................... 233
15.4 GPIOA Registers(Address Base: 0x4200_0000) ........................................ 235
15.4.1 GPIOA Data Register(GPIOA_DATA) ............................................. 235
15.4.2 GPIOA Output Latch Register(GPIOA_DATAOUT) ............................. 235
15.4.3 GPIOA Enable Set Register(GPIOA_OUTENSET) ............................... 235
15.4.4 GPIOA Enable Clear Register(GPIOA_OUTENCLR) ............................ 236
15.4.5 GPIOA Interrupt Enable Set Register(GPIOA_ INTENSET) ................... 236
15.4.6 GPIOA Interrupt Enable Clear Register(GPIOA_ INTENCLR) ................ 237
15.4.7 GPIOA Interrupt Type Set Register(GPIOA_ INTTYPESET) ................... 237
15.4.8 GPIOA Interrupt Type Clear Register(GPIOA_ INTTYPECLR) ................ 238
15.4.9 GPIOA Interrupt Polarity Set Register(GPIOA_ INTPOLSET) ................ 238
15.4.10 GPIOA Interrupt Polarity Clear Register(GPIOA_ INTPOLCLR) .............. 239
15.4.11 GPIOA Interrupt Status/Interrupt Clear Register(GPIOA_ INTSTATUS/
INTCLEAR) 239
15.4.12 GPIOA Lower Byte Masked Access Register(GPIOA_ LB_MASKED) ......... 240
15.4.13 GPIOA Upper Byte Masked Access Register(GPIOA_ UB_MASKED) ......... 240
15.5 Register map ............................................................................... 242
15.6 GPIOB Registers(Address Base: 0x4300_0000) ........................................ 243
15.6.1 GPIOB Data Register(GPIOB_DATA) ............................................. 243
15.6.2 GPIOB Output Latch Register(GPIOB_DATAOUT) ............................. 243
15.6.3 GPIOB Enable Set Register(GPIOB_OUTENSET) ............................... 243
15.6.4 GPIOB Enable Clear Register(GPIOB_OUTENCLR) ............................ 244
15.6.5 GPIOB Interrupt Enable Set Register(GPIOB_ INTENSET) ................... 244
15.6.6 GPIOB Interrupt Enable Clear Register(GPIOB_ INTENCLR) ................ 245
15.6.7 GPIOB Interrupt Type Set Register(GPIOB_ INTTYPESET) ................... 245
15.6.8 GPIOB Interrupt Type Clear Register(GPIOB_ INTTYPECLR) ................ 246
15.6.9 GPIOB Interrupt Polarity Set Register(GPIOB_ INTPOLSET) ................ 246
15.6.10 GPIOB Interrupt Polarity Clear Register(GPIOB_ INTPOLCLR) .............. 247
15.6.11 GPIOB Interrupt Status/Interrupt Clear Register(GPIOB_ INTSTATUS/
INTCLEAR) 248
15.6.12 GPIOB Lower Byte Masked Access Register(GPIOB_ LB_MASKED) ......... 248
15.6.13 GPIOB Upper Byte Masked Access Register(GPIOB_ UB_MASKED) ......... 248
15.7 Register map ............................................................................... 250
15.8 GPIOC Registers(Address Base: 0x4400_0000)........................................ 251
15.8.1 GPIOC Data Register(GPIOC_DATA) ............................................. 251
15.8.2 GPIOC Output Latch Register(GPIOC_DATAOUT) ............................. 251
15.8.3 GPIOC Enable Set Register(GPIOC_OUTENSET) ............................... 251
15.8.4 GPIOC Enable Clear Register(GPIOC_OUTENCLR) ............................ 252
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