13.4.32
PB_15 external interrupt enable register (PB_15_EXTINT)
Address offset : 0x27c
Reset value : 0x0000_0000
31
30
29
28
res
res
res
res
15
14
13
12
res
res
res
res
[0] PB15POL - External interrupt polarity selection register of PB_15 PAD
These bits are written by S/W.
0 : interrupt occurs when pad detect rising edge signal
1 : interrupt occurs when pad detect falling edge signal
[1] PB15IEN – External interrupt enable register of PB_15 PAD
These bits are written by S/W.
0 : external interrupt disable
1 : external interrupt enable
13.4.33
PC_00 external interrupt enable register (PC_00_EXTINT)
Address offset : 0x280
Reset value : 0x0000_0000
31
30
29
28
res
res
res
res
15
14
13
12
res
res
res
res
[0] PC00POL - External interrupt polarity selection register of PC_00 PAD
These bits are written by S/W.
0 : interrupt occurs when pad detect rising edge signal
1 : interrupt occurs when pad detect falling edge signal
[1] PC00IEN – External interrupt enable register of PC_00 PAD
These bits are written by S/W.
0 : external interrupt disable
W7500 Datasheet Version1.0.0
27
26
25
res
res
res
11
10
9
8
res
res
res
res
27
26
25
res
res
res
11
10
9
8
res
res
res
res
24
23
22
21
res
res
res
res
7
6
5
4
res
res
res
res
24
23
22
21
res
res
res
res
7
6
5
4
res
res
res
res
20
19
18
17
res
res
res
res
3
2
1
res
res
PB15IEN
R/W
20
19
18
17
res
res
res
res
3
2
1
res
res
PC00IEN
R/W
174 / 512
16
res
0
PB15POL
R/W
16
res
0
PC00POL
R/W