Register Map; Table 38 I2C1 Register Map And Reset Values - Wiznet W7500 Reference Manual

21.7

Register map

The following Table 38 summarizes the I2C1 registers.
Offset Register
I2C1PRER
0x00
reset value
I2C1CTR
0x04
reset value
I2C1CMD
0x08
reset value
I2C1SR
0x0C
reset value
I2C1TO
0x10
reset value
I2C1ADDR
0x14
reset value
I2C1TXR
0x18
reset value
I2C1RXR
0x1C
reset value
I2C1ISR
0x20
reset value
I2C1ISCR
0x24
reset value
I2C1ISMR
0x28
reset value
W7500 Datasheet Version1.0.0

Table 38 I2C1 register map and reset values

0 0
1 1
COUNT
0 0 0 0 0 0 0 0 0 1 0
0 0 0 0 0
0 0 0 0
0 0 0 0 0 0 0
COUNT
1 1 1 1 1 1 1 1 1 1 1
ADDR
0 0 0 0 0
Transmit Data
1 1 1 1 1
Receive Data
0 0 0 0 0
0 0
0 0
비고
SCL/SCH Register
1 0 0
Control Register
0
Command Register
Status Register
0 0 0
Timeout Register
1 1 1
Slave address Register
0 0 0
Transmit Register
1 1 1
Receive Register
0 0 0
Interrupt Status Register
0 0 0
Interrupt Status Clear Register
0
Interrupt Status Mask Register
0 0 0
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