Gpioa Interrupt Polarity Clear Register(Gpioa_ Intpolclr); Gpioa Interrupt Status/Interrupt Clear Register; Intclear) - Wiznet W7500 Reference Manual

31 30 29 28
res res res res
15 14 13 12
IPS15 IPS14 IPS13 IPS12
R/W R/W R/W R/W
[15:0] IPSy(y = 0..15)
WRITE as :
„0‟ is no effect
„1‟ is sets the interrupt polarity bit
READ as :
„0‟ is indicates for LOW level or falling edge
„1‟ is indicates for HIGH level or rising edge
15.4.10

GPIOA Interrupt Polarity Clear Register(GPIOA_ INTPOLCLR)

Address offset: 0x0034
Reset value: 0x----
31 30 29 28
res res res res
15 14 13 12
IPC15 IPC14 IPC13 IPC12
R/W R/W R/W R/W
[15:0] IPCy(y = 0..15)
WRITE as :
„0‟ is no effect
„1‟ is clears the interrupt polarity bit
READ as :
„0‟ is indicates for LOW level or falling edge
„1‟ is indicates for HIGH level or rising edge
15.4.11 GPIOA Interrupt Status/Interrupt Clear Register(GPIOA_
INTSTATUS/ INTCLEAR)
Address offset: 0x0038
W7500 Datasheet Version1.0.0
27 26 25 24
res res res res
11 10 9 8
IPS11 IPS10 IPS9 IPS8
R/W R/W R/W R/W
27 26 25 24
res res res res
11 10 9 8
IPC11 IPC10 IPC9 IPC8
R/W R/W R/W R/W
23 22 21 20
res res res res
7 6 5 4
IPS7 IPS6 IPS5 IPS4
R/W R/W R/W R/W
23 22 21 20
res res res res
7 6 5 4
IPC7 IPC6 IPC5 IPC4
R/W R/W R/W R/W
19 18 17 16
res res res res
3 2 1 0
IPS3 IPS2 IPS1 IPS0
R/W R/W R/W R/W
19 18 17 16
res res res res
3 2 1 0
IPC3 IPC2 IPC1 IPC0
R/W R/W R/W R/W
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