Registers (Base Address : 0X4100_4000); Dma Status Register (Dma_Status); Dma Configuration Register (Dma_Cfg) - Wiznet W7500 Reference Manual

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Registers (Base address : 0x4100_4000)

Address offset : 0x000

Reset value : 0x0005_0000

[0] ENABLE – Enable status of the controller

This bit is read only register to check enable status of DMA controller

0 : controller is disabled

1 : controller is enabled

[7:4] STATE – Current state of the control state machine.

These bits are read only register to check current state of controller. State can be

one of the following

0001 : reading channel controller data

0010 : reading source data end pointer

0011 : reading destination data end pointer

0100 : reading source data

0101 : writing destination data

0110 : waiting channel controller data

1000 : stalled

1010 : peripheral scatter-gather transition

1011 – 1111 : undefined.

Address offset : 0x004

Reset value : -

W7500 Datasheet Version1.0.0