I2C1 Registers(Base Address : 0X4000_9000); I2C1 Prescaler Register(I2C1_Prer) - Wiznet W7500 Reference Manual

21.6

I2C1 Registers(Base address : 0x4000_9000)

21.6.1 I2C1 Prescaler Register(I2C1
Software must set value for register I2C1_PRER to select the appropriate data rate. The
frequency is determined by the following formula:
Address offset: 0x00
Reset value: 0x0000_0014
31 30 29 28
res res res res
15 14 13 12
res res res res
[7:0] PRER – Prescaler Register
This field is used to prescaler ��
data counters
Where ��
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PRER
7
13
17
21
22
37
57
97
237
[31:8] Reserved, must be kept at reset value
2
The number of I2C, It means the 0,1
W7500 Datasheet Version1.0.0
27 26 25
res res res res
11 10 9
res res res res
������
SCL
is the frequency of pclk. The value should be greater than or equal to 4.
8
400
250
200
167
160
100
67
40
17
2
_PRER)
24 23 22 21
res res res
8 7 6 5
R/W R/W R/W
in order to generate the clock period SCL use for
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�� ∗ 6
Bit Freq(KHz) at ��
20
1000
625
500
416
400
250
167
100
42
20 19 18
res res res
4 3 2
PRER
R/W R/W R/W R/W
(MHz)
������
48
2400
1500
1200
1000
960
600
400
240
100
432 / 512
17 16
res res
1 0
R/W