Channel-3 Up-Down Mode Register (Pwmch3Udmr); Channel-3 Timer/Counter Mode Register (Pwmch3Tcmr) - Wiznet W7500 Reference Manual

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18.10.9

Channel-3 Up-Down Mode Register (PWMCH3UDMR)

Base address : 0x4000_5300
Address offset : 0x20
Reset value : 0x0000_0000
31
30
29
28
res
res
res
res
15
14
13
12
res
res
res
res
[0] UDM – Up-Down mode
0 : TC runs up count.
1 : TC runs down count.
18.10.10
Channel-3 Timer/Counter Mode Register
(PWMCH3TCMR)
Base address : 0x4000_5300
Address offset : 0x24
Reset value : 0x0000_0000
31
30
29
28
res
res
res
res
15
14
13
12
res
res
res
res
[1:0] TCM – Timer/Counter mode
00 : Timer mode.
01 : Counter mode with counting driven by rising edge external input .
10 : Counter mode with counting driven by falling edge external input.
11 : Counter mode with counting driven by rising and falling edge external
W7500 Datasheet Version1.0.0
27
26
25
24
res
res
res
res
11
10
9
8
res
res
res
res
27
26
25
24
res
res
res
res
11
10
9
8
res
res
res
res
input.
23
22
21
20
res
res
res
res
7
6
5
4
res
res
res
res
23
22
21
20
res
res
res
res
7
6
5
4
res
res
res
res
19
18
17
16
res
res
res
res
3
2
1
0
res
res
res
UDM
R/W
19
18
17
16
res
res
res
res
3
2
1
0
res
res
TCM
R/W
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