National Semiconductor Microwire Frame Format; Figure 75. National Semiconductor Microwire Frame Format, Single Transfer - Wiznet W7500 Reference Manual

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For continuous back-to-back transmissions, the SSPFSSOUT pin remains in its active-LOW
state, until the final bit of the last word has been captured, and then returns to its idle state
as the previous section describes.
For continuous back-to-back transfers, the SSPFSSOUT pin is held LOW between successive
data words and termination is the same as that of the single word transfer.
23.3.15

National Semiconductor Microwire frame format

Figure 75 shows the National Semiconductor Microwire frame format for a single frame.
SSPCLKOUT/
SSPCLKIN
SSPFSSOUT/
SSPFSSIN
SSPTXD
SSPRXD
nSSPOE
Figure 75.
Microwire format is very similar to the SPI format except that transmission is half-duplex
instead of full-duplex using a master-slave message passing technique. Each serial
transmission begins with an 8-bit control word that is transmitted from the PrimeCell SSP to
the off-chip slave device. During this transmission, the PrimeCell SSP receives no incoming
data. After the message has been sent, the off-chip slave decodes it and responds with the
required data after waiting one serial clock after the last bit of the 8-bit control message
has been sent. The returned data is 4 to 16 bits in length, making the total frame length in
the range of 13-25 bits.
In this configuration, during idle periods:
• SSPCLKOUT is forced LOW
• SSPFSSOUT is forced HIGH
• the transmit data line, SSPTXD, is arbitrarily forced LOW
• the nSSPOE pad enable signal is forced HIGH, making the transmit pad high impedance.
A transmission is triggered by writing a control byte to the transmit FIFO. The falling edge of
SSPFSSOUT causes the value contained in the bottom entry of the transmit FIFO to be
W7500 Datasheet Version1.0.0
MSB
8-bit control
National Semiconductor Microwire frame format, single transfer
LSB
LSB
4 to 16 bits
output data
0
MSB
MSB
LSB
LSB
LSB
491 / 512

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