Wiznet W7500 Reference Manual page 15

18.6.15 Channel-1 Dead Zone Enable Register (PWMCH1DZER) ..................... 317
18.6.16 Channel-1 Dead Zone Counter Register (PWMCH1DZCR) ................... 318
18.7 Register map ............................................................................... 319
18.8 PWM Channel-2 Registers (Base address : 0x4000_5200) ........................... 320
18.8.1 Channel-2 interrupt register(PWMCH2IR) ..................................... 320
18.8.2 Channel-2 interrupt enable register(PWMCH2IER) ........................... 320
18.8.3 Channel-2 interrupt clear register(PWMCH2ICR) ............................. 321
18.8.4 Channel-2 Timer/Counter Register (PWMCH2TCR) .......................... 321
18.8.5 Channel-2 Prescale Counter Register (PWMCH2PCR) ........................ 322
18.8.6 Channel-2 Prescale Register (PWMCH2PR) .................................... 322
18.8.7 Channel-2 Match Register (PWMCH2MR) ....................................... 323
18.8.8 Channel-2 Limit Register (PWMCH2LR) ........................................ 323
18.8.9 Channel-2 Up-Down Mode Register (PWMCH2UDMR) ........................ 323
18.8.10 Channel-2 Timer/Counter Mode Register (PWMCH2TCMR) ................. 324
18.8.11 Channel-2 PWM output Enable and External input Enable Register
(PWMCH2PEEER) 324
18.8.12 Channel-2 Capture Mode Register (PWMCH2CMR) ........................... 325
18.8.13 Channel-2 Capture Register (PWMCH2CR)..................................... 325
18.8.14 Channel-2 Periodic Mode Register (PWMCH2PDMR) ......................... 326
18.8.15 Channel-2 Dead Zone Enable Register (PWMCH2DZER) ..................... 326
18.8.16 Channel-2 Dead Zone Counter Register (PWMCH2DZCR) ................... 327
18.9 Register map ............................................................................... 328
18.10 PWM Channel-3 Registers (Base address : 0x4000_5300) ........................... 329
18.10.1 Channel-3 interrupt register(PWMCH3IR) ..................................... 329
18.10.2 Channel-3 interrupt enable register(PWMCH3IER) ........................... 329
18.10.3 Channel-3 interrupt clear register(PWMCH3ICR) ............................. 330
18.10.4 Channel-3 Timer/Counter Register (PWMCH3TCR) .......................... 330
18.10.5 Channel-3 Prescale Counter Register (PWMCH3PCR) ........................ 331
18.10.6 Channel-3 Prescale Register (PWMCH3PR) .................................... 331
18.10.7 Channel-3 Match Register (PWMCH3MR) ....................................... 332
18.10.8 Channel-3 Limit Register (PWMCH3LR) ........................................ 332
18.10.9 Channel-3 Up-Down Mode Register (PWMCH3UDMR) ........................ 333
18.10.10 Channel-3 Timer/Counter Mode Register (PWMCH3TCMR) ................. 333
18.10.11 Channel-3 PWM output Enable and External input Enable Register
(PWMCH3PEEER) 334
18.10.12 Channel-3 Capture Mode Register (PWMCH3CMR) ........................... 334
18.10.13 Channel-3 Capture Register (PWMCH3CR)..................................... 334
18.10.14 Channel-3 Periodic Mode Register (PWMCH3PDMR) ......................... 335
18.10.15 Channel-3 Dead Zone Enable Register (PWMCH3DZER) ..................... 335
W7500 Datasheet Version1.0.0
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