13.4
Registers (Base address : 0x4100_2000)
13.4.1
PA_00 external interrupt enable register (PA_00_EXTINT)
Address offset : 0x200
Reset value : 0x0000_0000
31
30
29
28
res
res
res
res
15
14
13
12
res
res
res
res
[0] PA00POL – External interrupt polarity selection register of PA_00 PAD
These bits are written by S/W.
0 : interrupt occurs when pad detect rising edge signal
1 : interrupt occurs when pad detect falling edge signal
[1] PA00IEN – External interrupt enable register of PA_00 PAD
These bits are written by S/W.
0 : external interrupt disable
1 : external interrupt enable
13.4.2
PA_01 external interrupt enable register (PA_01_EXTINT)
Address offset : 0x204
Reset value : 0x0000_0000
31
30
29
28
res
res
res
res
15
14
13
12
res
res
res
res
[0] PA01POL - External interrupt polarity selection register of PA_01 PAD
These bits are written by S/W.
0 : interrupt occurs when pad detect rising edge signal
1 : interrupt occurs when pad detect falling edge signal
[1] PA01IEN – External interrupt enable register of PA_01 PAD
These bits are written by S/W.
W7500 Datasheet Version1.0.0
27
26
25
res
res
res
11
10
9
8
res
res
res
res
27
26
25
res
res
res
11
10
9
8
res
res
res
res
24
23
22
21
res
res
res
res
7
6
5
4
res
res
res
res
24
23
22
21
res
res
res
res
7
6
5
4
res
res
res
res
20
19
18
17
res
res
res
res
3
2
1
res
res
PA00IEN
R/W
20
19
18
17
res
res
res
res
3
2
1
res
res
PA01IEN
R/W
157 / 512
16
res
0
PA00POL
R/W
16
res
0
PA01POL
R/W