Register Map; Table 25 Pwm Channel 4 Register Map And Reset Values - Wiznet W7500 Reference Manual

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18.13

Register map

The following Table 25 summarizes the PWM Channel-4 registers.
Offset
Register
PWMCH4IR
0x00
reset value
PWMCH4IER
0x04
reset value
PWMCH4ICR
0x08
reset value
PWMCH4TCR
0x0C
reset value
0
0
0
PWMCH4PCR
0x10
reset value
PWMCH4PR
0x14
reset value
PWMCH4MR
0x18
0
0
0
reset value
PWMCH4LR
0x1C
1
1
1
reset value
PWMCH4UDMR
0x20
reset value
PWMCH4TCMR
0x24
reset value
PWMCH4PEEER
0x28
reset value
PWMCH4CMR
0x2C
reset value
PWMCH4CR
0x30
0
0
0
reset value
PWMCH4PDMR
0x34
reset value
PWMCH4DZER
0x38
reset value
PWMCH4DZCR
0x3C
reset value
W7500 Datasheet Version1.0.0

Table 25 PWM channel 4 register map and reset values

0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
TCR
0
0
0
0
0
0
0
0
0
0
0
MR
0
0
0
0
0
0
0
0
0
0
0
LR
1
1
1
1
1
1
1
1
1
1
1
CR
0
0
0
0
0
0
0
0
0
0
0
DZC
0
0
0
0
비고
Channel-4 interrupt register
0
0
0
Channel-4 interrupt enable register
0
0
0
Channel-4 interrupt clear register
Write only register
Channel-4 Timer/Counter Register
0
0
0
0
0
0
Channel-4 Prescale Counter
PCR
Register
0
0
0
0
0
0
PR
Channel-4 Prescale Register
0
0
0
0
0
0
Channel-4 Match Register
0
0
0
0
0
0
Channel-4 Limit Register
1
1
1
1
1
1
Channel-4 Up-Down Mode Register
0
Channel-4 Timer/Counter Mode
TCM
Register
0
0
Channel-4 PWM output Enable and
PEEE
External input Enable Register
0
0
Channel-4 Capture Mode Register
0
Channel-4 Capture Register
0
0
0
0
0
0
Channel-4 Periodic Mode Register
0
Channel-4 Dead Zone Enable
Register
0
Channel-4 Dead Zone Counter
Register
0
0
0
0
0
0
346 / 512

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