Wiznet W7500 Reference Manual page 24

List of table
Table 1 W7500 interrupt assignments ......................................................... 37
Table 2 W7500 sleep mode summary .......................................................... 39
Table 3. Offset Address for Common Register ............................................... 46
Table 4. Offset Address in Socket n Register Block (n = 0,...,7, where n is Socket
number) ....................................................................................... 47
Table 5 operation of mode selection .......................................................... 84
Table 6 description of Flash memory .......................................................... 85
Table 7 External oscillator clock sources ..................................................... 93
Table 8 CRG register map and reset values ................................................. 115
Table 9 RNG register map and reset values ............................................... 122
Table 10 functional description table ........................................................ 123
Table 11 AFC register map and reset values ................................................ 152
Table 12 EXTINT register map and reset values ............................................ 186
Table 13 PAD controller register map and reset values ................................... 228
Table 14 GPIOA register map and reset values ............................................. 242
Table 15 GPIOB register map and reset values ............................................. 250
Table 16 GPIOC register map and reset values ............................................. 258
Table 17 GPIOD register map and reset values ............................................. 266
Table 18 Summary of the DMA requests for each channel ................................ 268
Table 19 DMA register map and reset values ................................................ 282
Table 20 ADC register map and reset values ................................................ 290
Table 21 PWM channel 0 register map and reset values .................................. 310
Table 22 PWM channel 1 register map and reset values .................................. 319
Table 23 PWM channel 2 register map and reset values .................................. 328
Table 24 PWM channel 3 register map and reset values .................................. 337
Table 25 PWM channel 4 register map and reset values .................................. 346
Table 26 PWM channel 5 register map and reset values .................................. 355
Table 27 PWM channel 6 register map and reset values .................................. 364
Table 28 PWM channel 7 register map and reset values .................................. 373
Table 29 PWM common register map and reset values .................................... 377
Table 30 Dual timer 0_0 register map and reset values .................................. 386
Table 31 Dual timer 0_1 register map and reset values .................................. 391
Table 32 Dual timer 0 clock enable register map and reset values ..................... 393
Table 33 Dual timer 1_0 register map and reset values .................................. 398
Table 34 Dual timer 1_1 register map and reset values .................................. 403
Table 35 Dual timer 1 clock enable register map and reset values ..................... 405
Table 36 Watchdog Timer register map and reset values ................................. 411
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W7500 Datasheet Version1.0.0