Wiznet W7500 Reference Manual page 16

18.10.16 Channel-3 Dead Zone Counter Register (PWMCH3DZCR) ................... 336
18.11 Register map ............................................................................... 337
18.12 PWM Channel-4 Registers (Base address : 0x4000_5400) ........................... 338
18.12.1 Channel-4 interrupt register(PWMCH4IR) ..................................... 338
18.12.2 Channel-4 interrupt enable register(PWMCH4IER) ........................... 338
18.12.3 Channel-4 interrupt clear register(PWMCH4ICR) ............................. 339
18.12.4 Channel-4 Timer/Counter Register (PWMCH4TCR) .......................... 339
18.12.5 Channel-4 Prescale Counter Register (PWMCH4PCR) ........................ 340
18.12.6 Channel-4 Prescale Register (PWMCH4PR) .................................... 340
18.12.7 Channel-4 Match Register (PWMCH4MR) ....................................... 341
18.12.8 Channel-4 Limit Register (PWMCH4LR) ........................................ 341
18.12.9 Channel-4 Up-Down Mode Register (PWMCH4UDMR) ........................ 341
18.12.10 Channel-4 Timer/Counter Mode Register (PWMCH4TCMR) ................. 342
18.12.11 Channel-4 PWM output Enable and External input Enable Register
(PWMCH4PEEER) 342
18.12.12 Channel-4 Capture Mode Register (PWMCH4CMR) ........................... 343
18.12.13 Channel-4 Capture Register (PWMCH4CR)..................................... 343
18.12.14 Channel-4 Periodic Mode Register (PWMCH4PDMR) ......................... 344
18.12.15 Channel-4 Dead Zone Enable Register (PWMCH4DZER) ..................... 344
18.12.16 Channel-4 Dead Zone Counter Register (PWMCH4DZCR) ................... 345
18.13 Register map ............................................................................... 346
18.14 PWM Channel-5 Registers (Base address : 0x4000_5500) ........................... 347
18.14.1 Channel-5 interrupt register(PWMCH5IR) ..................................... 347
18.14.2 Channel-5 interrupt enable register(PWMCH5IER) ........................... 347
18.14.3 Channel-5 interrupt clear register(PWMCH5ICR) ............................. 348
18.14.4 Channel-5 Timer/Counter Register (PWMCH5TCR) .......................... 348
18.14.5 Channel-5 Prescale Counter Register (PWMCH5PCR) ........................ 349
18.14.6 Channel-5 Prescale Register (PWMCH5PR) .................................... 349
18.14.7 Channel-5 Match Register (PWMCH5MR) ....................................... 350
18.14.8 Channel-5 Limit Register (PWMCH5LR) ........................................ 350
18.14.9 Channel-5 Up-Down Mode Register (PWMCH5UDMR) ........................ 350
18.14.10 Channel-5 Timer/Counter Mode Register (PWMCH5TCMR) ................. 351
18.14.11 Channel-5 PWM output Enable and External input Enable Register
(PWMCH5PEEER) 351
18.14.12 Channel-5 Capture Mode Register (PWMCH5CMR) ........................... 352
18.14.13 Channel-5 Capture Register (PWMCH5CR)..................................... 352
18.14.14 Channel-5 Periodic Mode Register (PWMCH5PDMR) ......................... 353
18.14.15 Channel-5 Dead Zone Enable Register (PWMCH5DZER) ..................... 353
18.14.16 Channel-5 Dead Zone Counter Register (PWMCH5DZCR) ................... 354
W7500 Datasheet Version1.0.0
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