Table Of Contents - ST STM32F413 Reference Manual

List of figures
Figure 302. Rts Flow Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 894
Figure 303. CTS flow control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 894
Figure 304. USART interrupt mapping diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 896
Figure 305. SPI block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 909
Figure 306. Full-duplex single master/ single slave application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 910
Figure 307. Half-Duplex Single Master/ Single Slave Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 911
Figure 308. Simplex single master/single slave application (master in transmit-only/
slave in receive-only mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 912
Figure 309. Master and three independent slaves. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 913
Figure 310. Multi-master application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 914
Figure 311. Hardware/Software Slave Select Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 915
Figure 312. Data Clock Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 917
Figure 313. Txe/Rxne/Bsy Behavior In Master / Full-Duplex Mode (Bidimode=0,
RXONLY=0) in the case of continuous transfers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 920
Figure 314. TXE/RXNE/BSY behavior in slave / full-duplex mode (BIDIMODE=0,
RXONLY=0) in the case of continuous transfers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 921
Figure 315. Transmission Using Dma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 923
Figure 316. Reception using DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 924
Figure 317. TI mode transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 927
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Figure 318. I S Philips protocol waveforms (16/32-bit full accuracy, CPOL = 0). . . . . . . . . . . . . . . . . 931
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Figure 319. I S Philips standard waveforms (24-bit frame with CPOL = 0) . . . . . . . . . . . . . . . . . . . . . 931
Figure 320. Transmitting 0X8Eaa33 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 932
Figure 321. Receiving 0x8EAA33 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 932
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Figure 322. I S Philips standard (16-bit extended to 32-bit packet frame with CPOL = 0) . . . . . . . . . 932
Figure 323. Example Of 16-Bit Data Frame Extended To 32-Bit Channel Frame . . . . . . . . . . . . . . . . . . . 933
Figure 324. MSB Justified 16-bit or 32-bit full-accuracy length with CPOL = 0 . . . . . . . . . . . . . . . . . . 933
Figure 325. MSB justified 24-bit frame length with CPOL = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 933
Figure 326. Msb Justified 16-Bit Extended To 32-Bit Packet Frame With Cpol = 0 . . . . . . . . . . . . . . . . 934
Figure 327. LSB justified 16-bit or 32-bit full-accuracy with CPOL = 0 . . . . . . . . . . . . . . . . . . . . . . . . 934
Figure 328. LSB justified 24-bit frame length with CPOL = 0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 934
Figure 329. Operations Required To Transmit 0X3478Ae. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 935
Figure 330. Operations required to receive 0x3478AE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 935
Figure 331. LSB justified 16-bit extended to 32-bit packet frame with CPOL = 0 . . . . . . . . . . . . . . . . 935
Figure 332. Example Of 16-Bit Data Frame Extended To 32-Bit Channel Frame . . . . . . . . . . . . . . . . . . . 936
Figure 333. PCM standard waveforms (16-bit) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 936
Figure 334. PCM standard waveforms (16-bit extended to 32-bit packet frame). . . . . . . . . . . . . . . . . 936
Figure 335. Audio sampling frequency definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 937
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Figure 336. I S clock generator architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 937
Figure 337. Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 956
Figure 338. Audio frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 958
Figure 339. FS role is start of frame + channel side identification (FSDEF = TRIS = 1) . . . . . . . . . . . 961
Figure 340. FS role is start of frame (FSDEF = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 961
Figure 341. Slot Size Configuration With Fboff = 0 In Sai_Xslotr . . . . . . . . . . . . . . . . . . . . . . . . . 962
Figure 342. First bit offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 962
Figure 343. Audio block clock generator overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 963
Figure 344. AC'97 audio frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 967
Figure 345. Data companding hardware in an audio block in the SAI . . . . . . . . . . . . . . . . . . . . . . . . . 969
Figure 346. Tristate Strategy On Sd Output Line On An Inactive Slot . . . . . . . . . . . . . . . . . . . . . . . . . . . 971
Figure 347. Tristate on output data line in a protocol like I2S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 972
Figure 348. Overrun Detection Error. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 973
Figure 349. FIFO underrun event . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 974
Figure 350. "No Response" And "No Data" Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 994
48/1284 DocID029473 Rev 3
RM0430